Migrate quilt patches into source

arch/arm/dts/sun60i-a733-cubie-a7s.dts

@@ -0,0 +1,278 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+// Copyright (C) 2025 Arm Ltd.
+
+/dts-v1/;
+
+#include "sun60i-a733.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Radxa A7S";
+	compatible = "radxa,cubie-a7s", "allwinner,sun60i-a733";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	reg_vcc5v: vcc5v {
+		/* board wide 5V supply from the USB-C connector */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	reg_usb_vbus: vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_vcc5v>;
+		gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>;	/* PL2 */
+		enable-active-high;
+	};
+
+	reg_usb_host_en: usb-host-en {
+		compatible = "regulator-fixed";
+		regulator-name = "usb-host-en";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_vcc5v>;
+		gpio = <&r_pio 1 5 GPIO_ACTIVE_HIGH>;	/* PM5 */
+		enable-active-high;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pb_pins>;
+	status = "okay";
+};
+
+&mmc0 {
+	bootph-all;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&mmc2 {
+	bootph-all;
+	bus-width = <8>;
+	cap-mmc-hw-reset;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	non-removable;
+	vmmc-supply = <&reg_cldo5>;
+	vqmmc-supply = <&reg_swout2>;
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "peripheral";
+	status = "okay";
+};
+
+&usbphy {
+	usb0_vbus-supply = <&reg_vcc5v>;
+	usb1_vbus-supply = <&reg_usb_vbus>;
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&gmac0 {
+	phy-mode = "rgmii-id";
+	phy-handle = <&ext_rgmii1_phy>;
+	phy-supply = <&reg_swout1>;
+
+	tx-internal-delay-ps = <1200>;
+	rx-internal-delay-ps = <1000>;
+
+	status = "okay";
+};
+
+&mdio0 {
+	ext_rgmii1_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+		reset-gpios = <&pio 7 16 GPIO_ACTIVE_LOW>; /* PH16 */
+		reset-assert-us = <10000>;
+		reset-deassert-us = <150000>;
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	eeprom: eeprom@50 {
+		compatible = "atmel,24c16a", "i2c-eeprom";
+		reg = <0x50>;
+	};
+};
+
+&r_i2c0 {
+	status = "okay";
+
+	axp318w: pmic@36 {
+		compatible = "x-powers,axp318w";
+		reg = <0x36>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		interrupt-parent = <&nmi_intc>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		status = "okay";
+
+		vin1-supply = <&reg_vcc5v>;
+		vin2-supply = <&reg_vcc5v>;
+		vin3-supply = <&reg_vcc5v>;
+
+		regulators {
+			reg_dcdc1: dcdc1 {
+				regulator-always-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-name = "vdd-3v3";
+			};
+
+			reg_swout1: swout1 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vdd-swout1";
+			};
+
+			reg_swout2: swout2 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vdd-swout2";
+			};
+
+			aldo1 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-mipi-dsi";
+			};
+
+			reg_bldo1: bldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-pe";
+			};
+
+			reg_bldo2: bldo2 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-pd";
+			};
+
+			/* Supplies the SYSFB */
+			reg_dcdc2_323: dcdc2 {
+				regulator-always-on;
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <800000>;
+				regulator-name = "vdd-sys";
+			};
+
+			/* Supplies the "big" cluster (1.8 GHz cores) */
+			reg_dcdc3_323: dcdc3 {
+				regulator-always-on;
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vdd-cpub";
+			};
+
+			/* DCDC4 is polyphased with DCDC1 */
+
+			/* Supplies the "small" cluster (1.8 GHz cores) */
+			reg_dcdc5_323: dcdc5 {
+				regulator-always-on;
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vdd-cpul";
+			};
+
+			reg_cldo1: cldo1 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-pm";
+			};
+
+			reg_cldo2: cldo2 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-hdmi";
+			};
+
+			reg_cldo3: cldo3 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-dram";
+			};
+
+			reg_cldo4: cldo4 {
+				/* not connected */
+			};
+
+			reg_cldo5: cldo5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-pc";
+			};
+		};
+	};
+};
+
+&spi0  {
+	status = "okay";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <20000000>;
+	};
+};
+
+&ufs {
+	bootph-all;
+	status = "okay";
+};
+
+&serdes {
+	status = "okay";
+	combophy0: combo-phy0@6c01000 {
+		lane_invert = <0 0 0 0>;
+		lane_remap = <2 3 0 1>;
+	};
+};
+
+&pcie_rc {
+	status = "okay";
+	pcie1v8-supply = <&reg_bldo1>;
+	pcie3v3-supply = <&reg_dcdc1>;
+};

arch/arm/dts/sun60i-a733.dtsi

@@ -210,6 +210,12 @@
 				drive-strength = <30>;
 				bias-pull-up;
 			};
+
+			i2c_pins: i2c-pins {
+				pins = "PG8" ,"PG9";
+				allwinner,pinmux = <6>;
+				function = "i2c0";
+			};
 		};
 
 		ccu: clock-controller@2002000 {
@@ -233,6 +239,22 @@
 			status = "okay";
 		};
 
+		i2c0: i2c@2510000 {
+			compatible = "allwinner,sun60i-a733-i2c",
+				     "allwinner,sun8i-v536-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x02510000 0x400>;
+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_I2C0>;
+			resets = <&ccu RST_BUS_I2C0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c_pins>;
+			status = "disabled";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		uart0: serial@2500000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x02500000 0x400>;

arch/arm/dts/sunxi-u-boot.dtsi

@@ -36,7 +36,11 @@
 			 * This value matches SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
 			 * and SYS_SPI_U_BOOT_OFFS if those are defined.
 			 */
+#ifdef CONFIG_MACH_SUN60I_A733
+			min-size = <0x4a000>;
+#else
 			min-size = <0x8000>;
+#endif
 			filename = "spl/sunxi-spl.bin";
 		};
 

arch/arm/include/asm/arch-sunxi/cpu.h

@@ -22,4 +22,15 @@
 #define SOCID_H5	0x1718
 #define SOCID_R40	0x1701
 
+#ifndef __ASSEMBLY__
+enum sunxi_soc_ver {
+	SUNXI_SOC_VER_INVALID = -1,
+	SUNXI_SOC_VER_A = 0,
+	SUNXI_SOC_VER_B = 1,
+	SUNXI_SOC_VER_C = 2,
+};
+
+enum sunxi_soc_ver sunxi_get_soc_ver(void);
+#endif /* __ASSEMBLY__ */
+
 #endif /* _SUNXI_CPU_H */

arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h

@@ -46,6 +46,11 @@
 
 #ifdef CONFIG_MACH_SUN60I_A733
 #define SUNXI_GIC600_BASE		0x03400000
+
+/* The A733 SoC version is encoded in the system control register. */
+#define SUNXI_SYSCTRL_BASE		0x03000000
+#define SUNXI_SOC_VER_REG		(SUNXI_SYSCTRL_BASE + 0x24)
+#define SUNXI_SOC_VER_MASK		0x7
 #endif
 
 #define SUNXI_MMC0_BASE			0x04020000
@@ -91,6 +96,7 @@
 void sunxi_board_init(void);
 void sunxi_reset(void);
 int sunxi_get_sid(unsigned int *sid);
+int sunxi_get_serial(unsigned int *serial);
 #endif
 
 #endif /* _SUNXI_CPU_SUNXI_NCAT2_H */

arch/arm/include/asm/arch-sunxi/spl.h

@@ -16,6 +16,8 @@
 #define SUNXI_BOOTED_FROM_NAND	1
 #define SUNXI_BOOTED_FROM_MMC2	2
 #define SUNXI_BOOTED_FROM_SPI	3
+#define SUNXI_BOOTED_FROM_SPI_A733	0x43
+#define SUNXI_BOOTED_FROM_UFS_A733	0x15
 #define SUNXI_BOOTED_FROM_MMC0_HIGH	0x10
 #define SUNXI_BOOTED_FROM_MMC2_HIGH	0x12
 

arch/arm/mach-sunxi/Kconfig

@@ -265,7 +265,7 @@ config SUNXI_BL31_BASE
 	default 0x40000000 if MACH_SUN50I_H616
 	default 0x00104000 if SUN50I_GEN_H6
 	default 0x00054000 if MACH_SUN55I_A523
-	default 0x00062000 if MACH_SUN60I_A733
+	default 0x48000000 if MACH_SUN60I_A733
 	default 0x0
 	help
 	  Address where BL31 (TF-A) is loaded, or zero if BL31 is not used.
@@ -274,6 +274,7 @@ config SUNXI_SCP_BASE
 	hex
 	default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5
 	default 0x00114000 if MACH_SUN50I_H6
+	default 0x48100000 if MACH_SUN60I_A733
 	default 0x0
 	help
 	  Address where SCP firmware is loaded, or zero if it is not used.

arch/arm/mach-sunxi/board.c

@@ -320,7 +320,10 @@ uint32_t sunxi_get_boot_device(void)
 	case SUNXI_BOOTED_FROM_MMC2_HIGH:
 		return BOOT_DEVICE_MMC2;
 	case SUNXI_BOOTED_FROM_SPI:
+	case SUNXI_BOOTED_FROM_SPI_A733:
 		return BOOT_DEVICE_SPI;
+	case SUNXI_BOOTED_FROM_UFS_A733:
+		return BOOT_DEVICE_UFS;
 	}
 
 	panic("Unknown boot source %d\n", boot_source);