Use native 8-bit PTX atomic loads and stores. - #10784
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📝 WalkthroughSummary by CodeRabbit
WalkthroughThe codegen adds 8-bit load and store templates using 16-bit temporaries. Generated CUDA PTX overloads now cover 8-bit atomic loads and stores across memory orders, volatility, MMIO, and thread scopes. Changes8-bit atomic support
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Suggested reviewers: Mergeability Score: 🔵 Low · up to The PR changes generated 8-bit atomic load/store declarations, but some signatures do not follow the required API qualifier, noexcept, and const-reference conventions. This creates a bounded risk for generated interface and compilation consistency, so the PR is mergeable with explicit owner follow-up to correct and regenerate those declarations. Comment |
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🧹 Nitpick comments (1)
libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h (1)
125-436: 🗄️ Data Integrity & Integration | 🔵 Trivial | ⚡ Quick winimportant: Add SASS checks for small owning and non-owning atomics.
cuda::atomic<T>withsizeof(T) < 4must use its 32-bit proxy and emitb32;cuda::atomic_ref<T>must emitb8for 1-byte operations. Add load and store checks for both paths.Source: Learnings
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📒 Files selected for processing (4)
libcudacxx/codegen/generators/definitions.hlibcudacxx/codegen/generators/ld_st.hlibcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_derived.hlibcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h
💤 Files with no reviewable changes (1)
- libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_derived.h
⏱️ CCCL compile-time benchmark comparison: Public headers compile-time benchResult: 0 regression row(s), 2 improvement row(s) above threshold.
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🟢 Direct file processing — Improvements
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Description
Resolves #10783.
This PR changes the PTX codegen of 8-bit atomics to directly load and store with the native 8 bit atomic load and store instructions.
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