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Use native 8-bit PTX atomic loads and stores. - #10784

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griwes merged 1 commit into
NVIDIA:mainfrom
griwes:feature/atomic-native-8-bit-load-store
Aug 13, 2026
Merged

Use native 8-bit PTX atomic loads and stores.#10784
griwes merged 1 commit into
NVIDIA:mainfrom
griwes:feature/atomic-native-8-bit-load-store

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@griwes griwes commented Aug 12, 2026

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Description

Resolves #10783.

This PR changes the PTX codegen of 8-bit atomics to directly load and store with the native 8 bit atomic load and store instructions.

Checklist

  • New or existing tests cover these changes.
  • The documentation is up to date with these changes.

@griwes
griwes requested a review from a team as a code owner August 12, 2026 23:10
@griwes
griwes requested a review from pciolkosz August 12, 2026 23:10
@github-project-automation github-project-automation Bot moved this to Todo in CCCL Aug 12, 2026
@cccl-authenticator-app cccl-authenticator-app Bot moved this from Todo to In Review in CCCL Aug 12, 2026
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coderabbitai Bot commented Aug 12, 2026

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Review Change Stack

📝 Walkthrough

Summary by CodeRabbit

  • New Features

    • Added support for 8-bit atomic loads and stores across supported memory scopes and ordering modes.
    • Added 8-bit load/store support for generated CUDA operations.
  • Bug Fixes

    • Improved handling of small operand sizes, including values up to 16 bits.
    • Corrected conversion behavior when transferring 8-bit values through supported hardware instructions.
    • Refined floating-point restrictions for small-width operations.

Walkthrough

The codegen adds 8-bit load and store templates using 16-bit temporaries. Generated CUDA PTX overloads now cover 8-bit atomic loads and stores across memory orders, volatility, MMIO, and thread scopes.

Changes

8-bit atomic support

Layer / File(s) Summary
8-bit codegen templates
libcudacxx/codegen/generators/definitions.h, libcudacxx/codegen/generators/ld_st.h
The generators accept 8-bit operands, use the "h" constraint for sizes up to 16 bits, and route 8-bit loads and stores through dedicated templates with uint16_t temporaries.
Generated atomic overloads
libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h
Generated overloads implement 8-bit atomic loads and stores for supported memory orders, volatility, MMIO, and thread scopes.

Assessment against linked issues

Objective Addressed Explanation
Use native PTX atomic loads and stores for 8-bit types [#10783]

Possibly related PRs

Suggested reviewers: pciolkosz, gevtushenko, davebayer

Mergeability Score: 🔵 Low · up to 237a9

The PR changes generated 8-bit atomic load/store declarations, but some signatures do not follow the required API qualifier, noexcept, and const-reference conventions. This creates a bounded risk for generated interface and compilation consistency, so the PR is mergeable with explicit owner follow-up to correct and regenerate those declarations.


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Actionable comments posted: 1

🧹 Nitpick comments (1)
libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h (1)

125-436: 🗄️ Data Integrity & Integration | 🔵 Trivial | ⚡ Quick win

important: Add SASS checks for small owning and non-owning atomics. cuda::atomic<T> with sizeof(T) < 4 must use its 32-bit proxy and emit b32; cuda::atomic_ref<T> must emit b8 for 1-byte operations. Add load and store checks for both paths.

Source: Learnings


ℹ️ Review info
⚙️ Run configuration

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Enterprise

Run ID: 7c502c9b-a16a-4a93-a9ef-8ff4493eb48f

📥 Commits

Reviewing files that changed from the base of the PR and between a5f6c04 and 237a9cf.

📒 Files selected for processing (4)
  • libcudacxx/codegen/generators/definitions.h
  • libcudacxx/codegen/generators/ld_st.h
  • libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_derived.h
  • libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_generated.h
💤 Files with no reviewable changes (1)
  • libcudacxx/include/cuda/std/__atomic/functions/cuda_ptx_derived.h

Comment thread libcudacxx/codegen/generators/ld_st.h
@griwes
griwes enabled auto-merge (squash) August 12, 2026 23:36
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⏱️ CCCL compile-time benchmark comparison: Public headers compile-time bench

Result: 0 regression row(s), 2 improvement row(s) above threshold.

Run Value
Config public-headers-gcc13
Baseline origin/main
Preset all-dev
Targets cub.headers.base, thrust.cpp.cuda.headers.base, libcudacxx.test.public_headers
GPU / launch args rtx2080 / --cuda 13.3 --host gcc13

Artifacts: reports and traces

Direct file processing

-f file-processing exclusive --sort total

🟢 Direct file processing — Improvements
Rank Improvement impact Selected Δ Baseline Current Event Matched traces
1 0.675741 -0.675741 5.407366 4.731625 Processing Header File: libcudacxx/include/cuda/std/__cccl/prologue.h 552
2 0.228610 -0.228610 1.682696 1.454086 Processing Header File: libcudacxx/include/cuda/std/__cccl/epilogue.h 552

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🥳 CI Workflow Results

🟩 Finished in 1h 36m: Pass: 100%/117 | Total: 2d 20h | Max: 1h 29m | Hits: 58%/657994

See results here.

@griwes
griwes merged commit 973d1d2 into NVIDIA:main Aug 13, 2026
148 checks passed
@github-project-automation github-project-automation Bot moved this from In Review to Done in CCCL Aug 13, 2026
@griwes
griwes deleted the feature/atomic-native-8-bit-load-store branch August 13, 2026 01:14
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Use native PTX atomic loads and stores for 8 bit types

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