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hisilicon: boot the GSL-signed Hi3519DV500 u-boot from a full NOR image - #127

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widgetii merged 1 commit into
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feat/dv500-gsl-boot
Jun 28, 2026
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hisilicon: boot the GSL-signed Hi3519DV500 u-boot from a full NOR image#127
widgetii merged 1 commit into
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feat/dv500-gsl-boot

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Follow-up to #126. That PR booted the raw self-extracting u-boot-z placed at flash offset 0, but the published dv500 NOR images (openipc-hi3519dv500-{dmeb,dmebpro}-nor-ultimate.bin, from OpenIPC/firmware#2211) put the GSL-signed boot image first: a GSL/DDR header at offset 0 with the u-boot-z payload embedded deeper (~0x11200).

The aarch64 flash-boot path loaded the file from offset 0 to the DDR link address and started CPU0 there, so it executed the non-executable GSL header and hung right after the FMC load (no U-Boot banner).

Fix

Locate the u-boot-z block before loading. Both layouts open the payload with an aarch64 reset branch (b, opcode 0x14......) immediately followed by a run of 0xdeadbeef self-descriptor markers — raw image at offset 0, GSL image at ~0x11200. Scan the first 256 KiB for that signature and rom_add_blob_fixed from there.

Verification

Booting the actual published GSL-signed images (-M hi3519dv500,flash-file=openipc-hi3519dv500-<binning>-nor-ultimate.bin), both binnings, 2/2 runs each:

U-Boot 2022.07-g66180744 (Jun 27 2026 ...) hi3519dv500
...
Starting kernel ...
VFS: Mounted root (squashfs filesystem) readonly on device 31:3.
Run /init as init process
Welcome to OpenIPC
openipc-hi3519dv500 login:

Zero Oops/panics, deterministic. With this, QEMU boots the released dv500 image verbatim — not just a raw u-boot — closing the loop on OpenIPC/firmware#2208.

🤖 Generated with Claude Code

PR #126 booted the raw self-extracting u-boot-z placed at flash offset 0,
but the *published* dv500 NOR images
(openipc-hi3519dv500-{dmeb,dmebpro}-nor-ultimate.bin) put the GSL-signed
boot image first: a GSL/DDR header at offset 0 with the u-boot-z payload
embedded deeper (~0x11200). The aarch64 flash-boot path blindly loaded the
file from offset 0 to the DDR link address and started CPU0 there, so it
executed the non-executable GSL header and hung right after the FMC load.

Locate the u-boot-z block before loading: both the raw image (offset 0) and
the GSL image open the payload with an aarch64 reset branch (b, opcode
0x14......) immediately followed by a run of 0xdeadbeef self-descriptor
markers. Scan the first 256 KiB for that signature and load from there.

Verified booting the published GSL-signed images end-to-end (U-Boot 2022.07
-> kernel -> squashfs -> "Welcome to OpenIPC" -> login), both binnings,
deterministic across runs, zero Oops. Completes the dv500 NOR boot started
in #126 so QEMU runs the actual released image, not just a raw u-boot.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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widgetii merged commit 40269ec into master Jun 28, 2026
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widgetii deleted the feat/dv500-gsl-boot branch June 28, 2026 04:47
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