Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)

Install Intel FPGA 'Quartus Prime' software on remote servers

SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)

Tutorial de instalação do Quartus Prime no Linux

Trying to get a new skill

Custom Altera FPGA designs by Olaoluwa Raji. This repository contains numerous projects that were successfully implemented on an Altera Cyclone IV FPGA using VHDL.

Full tutorial about how to install Quartus Prime software in different systems

A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)

This is a multi-core processor specially designed for matrix multiplication using Verilog HDL.

A script to convert the Intel Quartus IDE to dark mode using QDarkStyleSheet with some modifications.

FPGA SOC Mario NES in SystemVerilog. Built on a DE-10 Lite FPGA, synthesized in Quartus Prime 18.1

This repository showcases the projects I developed for the DE10-Lite board as part of the "FPGA Capstone: Building FPGA Projects" course on Coursera.

Mitigating Single-Event Upsets in COTS SDRAM using an EDAC SDRAM Controller

Script to build the bootloader (u-boot) and bring all components to a bootable image for Intel (ALTERA) SoC-FPGAs

A Python-based IP Core Management Infrastructure.

An 8-bit RISC based processor designed in verilog with x86 instructions.

Collection of scripts for EDA tools

Remote control infrared signal receiver programmed in VHDL for a Terasic DE1-SoC board.

This repository features a self-designed and enhanced single-cycle RISC-V processor, developed based on the Digital Design and Computer Architecture RISC-V Edition book.