Add atomic topei read-clear operations

riscv/CHANGELOG.md

@@ -9,7 +9,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Added
 
-- Add `mireg` and `sireg` CSRs
+
+- Add atomic topei read-clear operations
+- Add `mireg` CSR
 - Add `stopei` and `vstopei` CSRs (AIA supervisor/virtual-supervisor top external
   interrupt), completing the `*topei` set alongside `mtopei`.
 - Auto-generate `<FIELD>_SHIFT`, `<FIELD>_WIDTH`, and `<FIELD>_MASK` associated

riscv/src/register/macros.rs

@@ -104,6 +104,48 @@ macro_rules! read_csr_as_rv32 {
     };
 }
 
+/// Convenience macro to atomically read and clear a CSR as a `register` type.
+///
+/// This macro should generally not be called directly.
+#[macro_export]
+macro_rules! read_clear_csr_as {
+    ($register:ident, $csr_number:literal) => {
+        $crate::read_clear_csr_as!($register, $csr_number, any(target_arch = "riscv32", target_arch = "riscv64"));
+    };
+    ($register:ident, $csr_number:literal, $($cfg:meta),*) => {
+        /// Atomically reads and clears the CSR.
+        ///
+        /// # Safety
+        ///
+        /// Clearing this CSR may have side effects.
+        #[inline]
+        pub unsafe fn read_clear() -> $register {
+            try_read_clear().unwrap()
+        }
+
+        /// Attempts to atomically read and clear the CSR.
+        ///
+        /// # Safety
+        ///
+        /// Clearing this CSR may have side effects.
+        #[inline]
+        #[cfg_attr(not($($cfg),*), allow(unused_variables))]
+        pub unsafe fn try_read_clear() -> $crate::result::Result<$register> {
+            match () {
+                #[cfg($($cfg),*)]
+                () => {
+                    let bits: usize;
+                    core::arch::asm!(concat!("csrrw {0}, ", stringify!($csr_number), ", x0"), out(reg) bits);
+                    Ok($register { bits })
+                }
+                #[cfg(not($($cfg),*))]
+                () => Err($crate::result::Error::Unimplemented),
+            }
+        }
+
+    };
+}
+
 /// Convenience macro to read a CSR register value as a [`usize`].
 #[macro_export]
 macro_rules! read_csr_as_usize {

riscv/src/register/mtopei.rs

@@ -10,6 +10,8 @@ read_write_csr! {
     mask: 0x07FF_07FF,
 }
 
+read_clear_csr_as!(Mtopei, 0x35C);
+
 read_write_csr_field! {
     Mtopei,
     /// Interrupt ID (bits 16..26)

riscv/src/register/stopei.rs

@@ -10,6 +10,8 @@ read_write_csr! {
     mask: 0x07FF_07FF,
 }
 
+read_clear_csr_as!(Stopei, 0x15C);
+
 read_write_csr_field! {
     Stopei,
     /// Interrupt ID (bits 16..26)

riscv/src/register/vstopei.rs

@@ -10,6 +10,8 @@ read_write_csr! {
     mask: 0x07FF_07FF,
 }
 
+read_clear_csr_as!(Vstopei, 0x25C);
+
 read_write_csr_field! {
     Vstopei,
     /// Interrupt ID (bits 16..26)