Add RISC-V smoke test on QEMU by luhenry · Pull Request #19399 · pytorch/executorch

luhenry · 2026-05-08T17:41:55Z

Summary

Implements Phase 1 of the RISC-V Support RFC: cross-compile executor_runner for riscv64-linux-gnu, run a small BundledProgram under qemu-user-static on a x86_64 runner, and assert the standard "Test_result: PASS" marker that the portable executor_runner already emits via the bundled-IO comparison path (examples/portable/executor_runner/executor_runner.cpp:646 1).

The riscv64-linux preset mirrors arm-ethosu-linux. The only deviation is glibc instead of musl to avoid the MUSL_TOOLCHAIN_ROOT tarball setup.

The reusable _test_riscv.yml workflow is is triggered via pull.yml on every pull request.

Test plan

Ran locally, and integration to CI for automated testing.

cc @GregoryComer @digantdesai @cbilgin @psiddh @AdrianLundell @rascani @mergennachin

pytorch-bot · 2026-05-08T17:41:58Z

🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/19399

📄 Preview Python docs built from this PR

Note: Links to docs will display an error until the docs builds have been completed.

❗ 1 Active SEVs

There are 1 currently active SEVs. If your PR is affected, please view them below:

Run pull request jobs on OSDC runners in shadow mode

This comment was automatically generated by Dr. CI and updates every 15 minutes.

github-actions · 2026-05-08T17:42:38Z

This PR needs a `release notes:` label

If your change should be included in the release notes (i.e. would users of this library care about this change?), please use a label starting with release notes:. This helps us keep track and include your important work in the next release notes.

To add a label, you can comment to pytorchbot, for example
@pytorchbot label "release notes: none"

For more information, see
https://github.com/pytorch/pytorch/wiki/PyTorch-AutoLabel-Bot#why-categorize-for-release-notes-and-how-does-it-work.

Implements Phase 1 of the RISC-V Support RFC (pytorch#18991): cross-compile executor_runner for riscv64-linux-gnu, run a small BundledProgram under qemu-user-static on a stock x86_64 GitHub runner, and assert the standard "Test_result: PASS" marker that the portable executor_runner already emits via the bundled-IO comparison path (examples/portable/executor_runner/executor_runner.cpp:646). The riscv64-linux preset mirrors arm-ethosu-linux: same Linux cross-compile shape, same standard executor_runner, same filesystem .pte, same option set with EXECUTORCH_ENABLE_BUNDLE_IO added so the runner self-checks. Single deviation is glibc-via-apt instead of musl to avoid the MUSL_TOOLCHAIN_ROOT tarball setup. The reusable _test_riscv.yml workflow is wired into pull.yml on every PR.

The error we would get on CI is: ``` /usr/bin/riscv64-linux-gnu-gcc --sysroot=/usr/riscv64-linux-gnu -o CMakeFiles/cmTC_eb936.dir/testCCompiler.c.o -c /pytorch/executorch/cmake-out/CMakeFiles/CMakeScratch/TryCompile-o3upsB/testCCompiler.c Linking C executable cmTC_eb936 /opt/conda/envs/py_3.10/lib/python3.10/site-packages/cmake/data/bin/cmake -E cmake_link_script CMakeFiles/cmTC_eb936.dir/link.txt --verbose=1 /usr/lib/gcc-cross/riscv64-linux-gnu/11/../../../../riscv64-linux-gnu/bin/ld: cannot find /usr/riscv64-linux-gnu/lib/libc.so.6 inside /usr/riscv64-linux-gnu /usr/lib/gcc-cross/riscv64-linux-gnu/11/../../../../riscv64-linux-gnu/bin/ld: cannot find /usr/riscv64-linux-gnu/lib/libc_nonshared.a inside /usr/riscv64-linux-gnu /usr/lib/gcc-cross/riscv64-linux-gnu/11/../../../../riscv64-linux-gnu/bin/ld: cannot find /usr/riscv64-linux-gnu/lib/ld-linux-riscv64-lp64d.so.1 inside /usr/riscv64-linux-gnu collect2: error: ld returned 1 exit status ```

It is to not mark it as viable/strict to a release and pull request, until we can prove point its stability

It didn't need to be that complicated

GregoryComer · 2026-05-11T21:25:51Z

Thanks, I just re-triggered CI.

digantdesai · 2026-05-12T03:18:16Z

+examples/riscv/setup.sh        # apt: gcc-riscv64-linux-gnu, qemu-user-static
+examples/riscv/run.sh          # export, cross-compile, run under qemu-user


digantdesai · 2026-05-12T03:28:52Z

+"""AOT export for the RISC-V Phase 1.0 smoke test.
+
+Exports a trivial ``torch.add`` module to a BundledProgram (.bpte) that the
+portable executor_runner can load on a riscv64 target and verify against the


Nit, perhaps we should plan to add riscv32 support in the future, even if we don't add it now, and not assume march too tightly. I am thinking about embedded uscases.

Absolutely. I don’t have direct input on customers asking for it, but the current scripts can easily be extended to test on qemu-static-riscv32.

Filed #19531 on the Embedded backlog to follow up on this. Will probably wait until @luhenry has paved the way a bit more with rv64. :)

luhenry · 2026-05-12T20:09:39Z

I've got changes for enabling XNNPACK, mobilenetv2 and mobilebert at riseproject-dev/executorch@riscv-testing...riseproject-dev:executorch:riscv-testing-mobilenetv2 once this PR is merged. It's all incremental, other than needing to add the executorch-ubuntu-24.04-gcc14 image (which I can break out in a different PR as well).

luhenry · 2026-05-12T20:16:43Z

I just submitted #19521 to add a executorch-ubuntu-24.04-gcc14 build image that's necessary to have a newer gcc version that supports RVV (aka vectorization) which is necessary for XNNPACK

rascani · 2026-05-13T00:40:54Z

@luhenry - Can you fix up the lints? I think that is the last merge blocker.

luhenry requested review from kirklandsign and larryliu0820 as code owners May 8, 2026 17:41

meta-cla Bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label May 8, 2026

luhenry force-pushed the riscv-testing branch from 850d851 to 56f6e50 Compare May 8, 2026 19:01

luhenry changed the title ~~Add RISC-V Phase 1 smoke test on QEMU~~ Add RISC-V smoke test on QEMU May 8, 2026

luhenry commented May 8, 2026

View reviewed changes

Comment thread .github/workflows/_test_riscv.yml Outdated

luhenry added 2 commits May 9, 2026 01:18

Fix wrong runner

04fd660

luhenry force-pushed the riscv-testing branch from 56f6e50 to 04fd660 Compare May 8, 2026 23:18

rascani approved these changes May 8, 2026

View reviewed changes

luhenry added 2 commits May 9, 2026 17:27

Fix locally

af79b03

luhenry mentioned this pull request May 11, 2026

[RFC] First-class RISC-V support in ExecuTorch #18991

Open

mergennachin reviewed May 11, 2026

View reviewed changes

Comment thread .github/workflows/pull.yml Outdated

Comment thread examples/riscv/run.sh Outdated

Comment thread examples/riscv/run.sh Outdated

luhenry added 4 commits May 11, 2026 22:34

Move test-riscv job into dedicated workflow

27c02de

It is to not mark it as viable/strict to a release and pull request, until we can prove point its stability

Do not clobber build dir and checkout

10a6f58

Fail loudly and clearly when something goes wrong

f98a5f6

Cleanup examples/riscv/riscv64-linux-gnu-toolchain.cmake

d0cbb51

It didn't need to be that complicated

digantdesai reviewed May 12, 2026

View reviewed changes

mergennachin approved these changes May 12, 2026

View reviewed changes

rascani mentioned this pull request May 13, 2026

Add RV32 support #19531

Open

lintrunner

6fbf6d7

Provide feedback

Saved searches

Use saved searches to filter your results more quickly

Add RISC-V smoke test on QEMU#19399

Add RISC-V smoke test on QEMU#19399
luhenry wants to merge 9 commits into
pytorch:mainfrom
riseproject-dev:riscv-testing

luhenry commented May 8, 2026

Uh oh!

pytorch-bot Bot commented May 8, 2026 •

edited

Loading

Uh oh!

github-actions Bot commented May 8, 2026

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

GregoryComer commented May 11, 2026

Uh oh!

digantdesai May 12, 2026

Uh oh!

digantdesai May 12, 2026 •

edited

Loading

Uh oh!

luhenry May 12, 2026

Uh oh!

rascani May 13, 2026

Uh oh!

luhenry commented May 12, 2026

Uh oh!

luhenry commented May 12, 2026 •

edited

Loading

Uh oh!

rascani commented May 13, 2026

Uh oh!

Reviewers

Assignees

Labels

Projects

Milestone

Development

Uh oh!

6 participants

		examples/riscv/setup.sh # apt: gcc-riscv64-linux-gnu, qemu-user-static
		examples/riscv/run.sh # export, cross-compile, run under qemu-user

Conversation

luhenry commented May 8, 2026

Summary

Test plan

Uh oh!

pytorch-bot Bot commented May 8, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/19399

❗ 1 Active SEVs

Uh oh!

github-actions Bot commented May 8, 2026

This PR needs a release notes: label

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

GregoryComer commented May 11, 2026

Uh oh!

digantdesai May 12, 2026

Choose a reason for hiding this comment

Uh oh!

digantdesai May 12, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Choose a reason for hiding this comment

Uh oh!

luhenry May 12, 2026

Choose a reason for hiding this comment

Uh oh!

rascani May 13, 2026

Choose a reason for hiding this comment

Uh oh!

luhenry commented May 12, 2026

Uh oh!

luhenry commented May 12, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Uh oh!

rascani commented May 13, 2026

Uh oh!

Reviewers

Assignees

Labels

Projects

Milestone

Development

Uh oh!

6 participants

pytorch-bot Bot commented May 8, 2026 •

edited

Loading

This PR needs a `release notes:` label

digantdesai May 12, 2026 •

edited

Loading

luhenry commented May 12, 2026 •

edited

Loading