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oscimp / fpga_ip Public

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Fork 16
Star 28

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Add CIC filter IP#1

Open

bendub wants to merge 18 commits into

oscimp:masteroscimp/fpga_ip:masterfrom

bendub:cic_filterbendub/fpga_ip:cic_filterCopy head branch name to clipboard

Conversation Commits18 (18)Checks Files changed

Open

Add CIC filter IP#1
bendub wants to merge 18 commits into
oscimp:masterfrom
bendub:cic_filter

Commits

Commits on Oct 2, 2025

Add CIC filter IP: first commit
bendub
committed
Use 'env' in header instead of direct call to Python to increase compatibility in virtual environment.
bendub
committed
Add PID with 'velocity' architecture IP. First commit.
bendub
committed

Commits on Oct 14, 2025

Syntax update
bendub
committed
Correct simulation stimuli. Also update syntax.
bendub
committed
Update syntax.
bendub
committed
Add 'Bit pruning' to parameters.
bendub
committed
Enable 'bit pruning' by default. Correct syntax error.
bendub
committed
Correct bit pruning implementation.
bendub
committed
Update/Correct test after 'bit pruning' implementation.
bendub
committed
Remane file.
bendub
committed
Correct copy/paste error.
bendub
committed
Untrack temporary files
bendub
committed
Rename mispeled file
bendub
committed
Remove useless file: no need to connect IP to AXI bus.
bendub
committed
Remove useless file: not a part of the IP.
bendub
committed
Remove useless file: file renamed to integrator.vhd.
bendub
committed
Update cicReal from cicComplex correction.
bendub
committed

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