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8386889: [lworld] Redundant StoreStore membar after FlatValuePayload::read #2581

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8386889: [lworld] Redundant StoreStore membar after FlatValuePayload::read #2581

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8386889: [lworld] Redundant StoreStore membar after FlatValuePayload:…
jsikstro Jun 25, 2026
0186aa7
Add twi_0 + isync after read_flat_field in templateTable_ppc_64.cpp
jsikstro Jun 25, 2026
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4 changes: 0 additions & 4 deletions src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp
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Expand Up @@ -870,10 +870,6 @@ OopMapSet* Runtime1::generate_code_for(StubId id, StubAssembler* sasm) {
f.load_argument(0, r1); // r1,: index
int call_offset = __ call_RT(r0, noreg, CAST_FROM_FN_PTR(address, load_flat_array), r0, r1);

// Ensure the stores that initialize the buffer are visible
// before any subsequent store that publishes this reference.
__ membar(Assembler::StoreStore);

oop_maps = new OopMapSet();
oop_maps->add_gc_map(call_offset, map);
restore_live_registers_except_r0(sasm);
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1 change: 0 additions & 1 deletion src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp
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Expand Up @@ -212,7 +212,6 @@ void InterpreterMacroAssembler::get_method_counters(Register method,

void InterpreterMacroAssembler::read_flat_field(Register entry, Register obj) {
call_VM(obj, CAST_FROM_FN_PTR(address, InterpreterRuntime::read_flat_field), obj, entry);
membar(Assembler::StoreStore);
}

void InterpreterMacroAssembler::write_flat_field(Register entry, Register field_offset,
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1 change: 0 additions & 1 deletion src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp
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Expand Up @@ -2432,7 +2432,6 @@ void InterpreterMacroAssembler::notify_method_exit(bool is_native_method, TosSta

void InterpreterMacroAssembler::read_flat_field(Register entry, Register obj) {
call_VM(obj, CAST_FROM_FN_PTR(address, InterpreterRuntime::read_flat_field), obj, entry);
membar(Assembler::StoreStore | Assembler::LoadLoad); // for allocation and volatile load
}

void InterpreterMacroAssembler::write_flat_field(Register entry, Register tmp1, Register tmp2,
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3 changes: 2 additions & 1 deletion src/hotspot/cpu/ppc/templateTable_ppc_64.cpp
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Expand Up @@ -3417,7 +3417,8 @@ void TemplateTable::fast_accessfield(TosState state) {
if (support_IRIW_for_not_multiple_copy_atomic_cpu) { __ fence(); }
__ read_flat_field(Rcache, R17_tos);
__ verify_oop(R17_tos);
// memory barrier in read_flat_field
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__ twi_0(R17_tos);
__ isync();
break;
}
case Bytecodes::_fast_agetfield:
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4 changes: 0 additions & 4 deletions src/hotspot/cpu/riscv/c1_Runtime1_riscv.cpp
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Expand Up @@ -871,10 +871,6 @@ OopMapSet* Runtime1::generate_code_for(StubId id, StubAssembler* sasm) {
f.load_argument(0, x11); // x11,: index
int call_offset = __ call_RT(x10, noreg, CAST_FROM_FN_PTR(address, load_flat_array), x10, x11);

// Ensure the stores that initialize the buffer are visible
// before many subsequent store that publishes this reference.
__ membar(MacroAssembler::StoreStore);

oop_maps = new OopMapSet();
oop_maps->add_gc_map(call_offset, map);
restore_live_registers_except_r10(sasm);
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1 change: 0 additions & 1 deletion src/hotspot/cpu/riscv/interp_masm_riscv.cpp
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Expand Up @@ -1868,7 +1868,6 @@ void InterpreterMacroAssembler::get_method_counters(Register method,

void InterpreterMacroAssembler::read_flat_field(Register entry, Register obj) {
call_VM(obj, CAST_FROM_FN_PTR(address, InterpreterRuntime::read_flat_field), obj, entry);
membar(MacroAssembler::StoreStore);
}

void InterpreterMacroAssembler::write_flat_field(Register entry, Register field_offset,
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