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7 changes: 7 additions & 0 deletions .cargo/config.toml
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
# This wildcard allows to merge whatever user might have configured in their home folder
[target.'cfg(all())']
# TODO: `-Znext-solver=globally` is a requirement for `generic_const_args`, `-Zmin-recursion-limit=256` is in turn
# needed for some crates due to `-Znext-solver=globally`
rustflags = ["-Znext-solver=globally", "-Zmin-recursion-limit=256"]
rustdocflags = ["-Znext-solver=globally", "-Zmin-recursion-limit=256"]
# TODO: Specify `miriflags` is/when it is supported: https://github.com/rust-lang/cargo/issues/17079
4 changes: 3 additions & 1 deletion .github/workflows/gh-pages.yml
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,9 @@ jobs:
cargo -Zgitoxide -Zgit doc --locked --all --no-deps --lib --all-features
cp -r target/doc gh-pages/rust-docs
env:
RUSTDOCFLAGS: "-D rustdoc::broken-intra-doc-links -D rustdoc::private_intra_doc_links -Z unstable-options --enable-index-page"
# TODO: `-Znext-solver=globally` is a requirement for `generic_const_args`, `-Zmin-recursion-limit=256` is in
# turn needed for some crates due to `-Znext-solver=globally`
RUSTDOCFLAGS: -Znext-solver=globally -Zmin-recursion-limit=256 -D rustdoc::broken-intra-doc-links -D rustdoc::private_intra_doc_links -Z unstable-options --enable-index-page

- name: Install Hugo
uses: peaceiris/actions-hugo@75d2e84710de30f6ff7268e08f310b60ef14033f #v3.0.0
Expand Down
13 changes: 9 additions & 4 deletions .github/workflows/rust.yml
Original file line number Diff line number Diff line change
Expand Up @@ -15,10 +15,14 @@ env:
# Not needed in CI, should make things a bit faster
CARGO_INCREMENTAL: 0
CARGO_TERM_COLOR: always
# Build smaller artifacts to avoid running out of space in CI and make it a bit faster
RUSTFLAGS: -C strip=symbols
# Build smaller artifacts to avoid running out of space in CI and make it a bit faster.
# TODO: `-Znext-solver=globally` is a requirement for `generic_const_args`, `-Zmin-recursion-limit=256` is in turn
# needed for some crates due to `-Znext-solver=globally`
RUSTFLAGS: -Znext-solver=globally -Zmin-recursion-limit=256 -C strip=symbols
# Needed for things like file system access
MIRIFLAGS: -Zmiri-disable-isolation
# TODO: `-Znext-solver=globally` is a requirement for `generic_const_args`, `-Zmin-recursion-limit=256` is in turn
# needed for some crates due to `-Znext-solver=globally`
MIRIFLAGS: -Znext-solver=globally -Zmin-recursion-limit=256 -Zmiri-disable-isolation
RUST_BACKTRACE: full

jobs:
Expand Down Expand Up @@ -97,7 +101,8 @@ jobs:
- &riscv-support-step
name: RISC-V support
run: |
echo "command=${{ env.command }} -Zbuild-std" >> $GITHUB_ENV
# TODO: Everything after `-Zbuild-std` is a workaround to get `-Znext-solver=globally` working with cross-compilation
echo "command=${{ env.command }} -Zbuild-std -Ztarget-applies-to-host -Zhost-config --config 'host.rustflags=[\"-Znext-solver=globally\"]'" >> $GITHUB_ENV
echo "RUSTFLAGS=${{ env.RUSTFLAGS }} -C linker=riscv64-linux-gnu-gcc" >> $GITHUB_ENV
# TODO: Temporary workaround for https://github.com/rust-lang/cc-rs/issues/1654
echo "CC_riscv64_unknown_none_abundance=riscv64-linux-gnu-gcc" >> $GITHUB_ENV
Expand Down
3 changes: 1 addition & 2 deletions Cargo.lock

Some generated files are not rendered by default. Learn more about how customized files appear on GitHub.

6 changes: 4 additions & 2 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -296,8 +296,6 @@ doc_markdown = "allow"
ignore_without_reason = "allow"
ignored_unit_patterns = "allow"
indexing_slicing = "allow"
# TODO: Currently used for very context-specific workarounds for `generic_const_exprs` that would be awkward to rewrite
items_after_statements = "allow"
many_single_char_names = "allow"
min_ident_chars = "allow"
missing_assert_message = "allow"
Expand Down Expand Up @@ -330,3 +328,7 @@ non_zero_suggestions = "allow"
redundant_type_annotations = "allow"
# TODO: Re-enable once false-positive is resolved: https://github.com/rust-lang/rust-clippy/issues/17039
unnecessary_safety_comment = "allow"

[patch.crates-io]
# TODO: Remove once `3.7.6` or newer is released
parity-scale-codec-derive = { git = "https://github.com/paritytech/parity-scale-codec", rev = "a6a501af9db4302261aa4fa0c012781352e833a3" }
Comment thread
nazar-pc marked this conversation as resolved.
14 changes: 7 additions & 7 deletions crates/contracts/core/ab-contract-file/src/instruction.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ pub struct ContractRegisters {
regs: [u64; 32],
}

impl const RegisterFile<ContractRegister> for ContractRegisters {
const impl RegisterFile<ContractRegister> for ContractRegisters {
#[inline(always)]
fn read(&self, reg: ContractRegister) -> u64 {
if reg == ContractRegister::Zero {
Expand Down Expand Up @@ -101,7 +101,7 @@ pub enum ContractRegister {
T6 = 31,
}

impl const Default for ContractRegister {
const impl Default for ContractRegister {
#[inline(always)]
fn default() -> Self {
Self::Zero
Expand Down Expand Up @@ -151,7 +151,7 @@ impl fmt::Debug for ContractRegister {
}
}

impl const PartialEq for ContractRegister {
const impl PartialEq for ContractRegister {
#[inline(always)]
fn eq(&self, other: &Self) -> bool {
// This is quite ugly, but the default `derive` isn't `const` there doesn't seem to be a
Expand Down Expand Up @@ -192,9 +192,9 @@ impl const PartialEq for ContractRegister {
}
}

impl const Eq for ContractRegister {}
const impl Eq for ContractRegister {}

impl const Register for ContractRegister {
const impl Register for ContractRegister {
const ZERO: Self = Self::Zero;
const SP: Self = Self::Sp;
const RA: Self = Self::Ra;
Expand Down Expand Up @@ -241,7 +241,7 @@ impl const Register for ContractRegister {
}

/// SAFETY: `Self::from_bits()` returns `Some()` for `1`, `8`, `9` and `18..=27`
unsafe impl const ZcmpRegister for ContractRegister {
const unsafe impl ZcmpRegister for ContractRegister {
const RVE: bool = false;
}

Expand All @@ -264,7 +264,7 @@ unsafe impl const ZcmpRegister for ContractRegister {
pub enum ContractInstruction<Reg = ContractRegister> {}

#[instruction]
impl<Reg> const Instruction for ContractInstruction<Reg>
const impl<Reg> Instruction for ContractInstruction<Reg>
where
Reg: [const] Register<Type = u64>,
{
Expand Down
4 changes: 0 additions & 4 deletions crates/contracts/core/ab-contract-file/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -41,10 +41,6 @@
trusted_len,
try_blocks
)]
#![expect(incomplete_features, reason = "generic_const_exprs")]
// TODO: This feature is not actually used in this crate, but is added as a workaround for
// https://github.com/rust-lang/rust/issues/141492
#![feature(generic_const_exprs)]
#![no_std]

pub mod instruction;
Expand Down
2 changes: 1 addition & 1 deletion crates/contracts/core/ab-contracts-common/src/metadata.rs
Original file line number Diff line number Diff line change
Expand Up @@ -142,7 +142,7 @@ pub enum ContractMetadataKind {
Return,
}

impl const TryFrom<u8> for ContractMetadataKind {
const impl TryFrom<u8> for ContractMetadataKind {
type Error = ();

#[inline(always)]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -122,6 +122,7 @@ fn process_trait_definition(mut item_trait: ItemTrait) -> Result<TokenStream, Er
#ext_trait

/// FFI code generated by procedural macro
#[expect(clippy::inline_modules, reason = "Macro-generated code")]
pub mod ffi {
use super::*;

Expand Down Expand Up @@ -261,6 +262,7 @@ fn process_trait_impl(mut item_impl: ItemImpl, trait_name: &Ident) -> Result<Tok
}

/// FFI code generated by procedural macro
#[expect(clippy::inline_modules, reason = "Macro-generated code")]
pub mod #ffi_mod_ident {
use super::*;

Expand Down Expand Up @@ -518,6 +520,7 @@ fn process_struct_impl(mut item_impl: ItemImpl) -> Result<TokenStream, Error> {
#ext_trait

/// FFI code generated by procedural macro
#[expect(clippy::inline_modules, reason = "Macro-generated code")]
pub mod ffi {
use super::*;

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -616,6 +616,7 @@ impl MethodDetails {
let metadata = self.generate_metadata(fn_sig, trait_name)?;

Ok(quote_spanned! {fn_sig.span() =>
#[expect(clippy::inline_modules, reason = "Macro-generated code")]
pub mod #original_method_name {
use super::*;

Expand All @@ -637,6 +638,7 @@ impl MethodDetails {
let metadata = self.generate_metadata(fn_sig, trait_name)?;

Ok(quote_spanned! {fn_sig.span() =>
#[expect(clippy::inline_modules, reason = "Macro-generated code")]
pub mod #original_method_name {
use super::*;

Expand Down Expand Up @@ -1082,6 +1084,7 @@ impl MethodDetails {

quote! {
#[doc(hidden)]
#[expect(clippy::inline_modules, reason = "Macro-generated code")]
pub mod fn_pointer {
use super::*;

Expand Down
14 changes: 12 additions & 2 deletions crates/contracts/core/ab-contracts-tooling/src/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,10 +40,12 @@ pub fn build_cdylib(options: BuildOptions<'_>) -> anyhow::Result<PathBuf> {
.env_remove("RUSTFLAGS")
.env_remove("CARGO_ENCODED_RUSTFLAGS")
// Hack for enabling RISC-V Zknh backend in `sha2` crate since it is a nightly-only feature,
// and they really don't like using normal features for it
// and they really don't like using normal features for it.
// `-Znext-solver=globally` is needed for `generic_const_args` in various crates.
.env(
"RUSTFLAGS",
"--cfg sha2_backend=\"riscv-zknh\" --cfg sha2_backend_riscv_zknh=\"compact\"",
r#"--cfg sha2_backend="riscv-zknh" --cfg sha2_backend_riscv_zknh="compact"
-Znext-solver=globally"#,
)
.args([
"rustc",
Expand All @@ -55,6 +57,14 @@ pub fn build_cdylib(options: BuildOptions<'_>) -> anyhow::Result<PathBuf> {
target_specification_path
.to_str()
.context("Path to target specification file is not valid UTF-8")?,
])
// `-Znext-solver=globally` is needed for `generic_const_args` in various crates, it is not
// propagated to the target's build script by default, hence such hacks
.args([
"-Ztarget-applies-to-host",
"-Zhost-config",
"--config",
r#"host.rustflags=["-Znext-solver=globally"]"#,
]);

if env::var("MIRI_SYSROOT").is_ok() {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ pub enum TransactionMethodContext {
Wallet,
}

impl const TryFrom<u8> for TransactionMethodContext {
const impl TryFrom<u8> for TransactionMethodContext {
type Error = ();

#[inline(always)]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ pub(crate) type AbundanceRv32IMaxInstruction = AbundanceRv32IMaxInstructionProto
pub(crate) enum AbundanceRv32IMaxInstructionPrototype<Reg> {}

#[instruction]
impl<Reg> const Instruction for AbundanceRv32IMaxInstructionPrototype<Reg>
const impl<Reg> Instruction for AbundanceRv32IMaxInstructionPrototype<Reg>
where
Reg: [const] Register<Type = u32>,
{
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ const VLEN: u32 = 1024;

pub(crate) struct AbundanceRv32IMaxExtState {
csrs: BTreeMap<u16, u32>,
vregs: VectorRegisterFile<{ Self::VLENB as usize }>,
vregs: VectorRegisterFile<const { Self::VLENB }>,
}

impl AbundanceRv32IMaxExtState {
Expand Down Expand Up @@ -95,11 +95,11 @@ impl VectorRegisters for AbundanceRv32IMaxExtState
where
Self: Csrs<<AbundanceRv32IMaxInstruction as Instruction>::Reg>,
{
fn read_vregs(&self) -> &VectorRegisterFile<{ Self::VLENB as usize }> {
fn read_vregs(&self) -> &VectorRegisterFile<{ Self::VLENB }> {
&self.vregs
}

fn write_vregs(&mut self) -> &mut VectorRegisterFile<{ Self::VLENB as usize }> {
fn write_vregs(&mut self) -> &mut VectorRegisterFile<{ Self::VLENB }> {
&mut self.vregs
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ pub(crate) type AbundanceRv64IMaxInstruction = AbundanceRv64IMaxInstructionProto
pub(crate) enum AbundanceRv64IMaxInstructionPrototype<Reg> {}

#[instruction]
impl<Reg> const Instruction for AbundanceRv64IMaxInstructionPrototype<Reg>
const impl<Reg> Instruction for AbundanceRv64IMaxInstructionPrototype<Reg>
where
Reg: [const] Register<Type = u64>,
{
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ const VLEN: u32 = 1024;

pub(crate) struct AbundanceRv64IMaxExtState {
csrs: BTreeMap<u16, u64>,
vregs: VectorRegisterFile<{ Self::VLENB as usize }>,
vregs: VectorRegisterFile<const { Self::VLENB }>,
}

impl AbundanceRv64IMaxExtState {
Expand Down Expand Up @@ -98,11 +98,11 @@ impl VectorRegisters for AbundanceRv64IMaxExtState
where
Self: Csrs<<AbundanceRv64IMaxInstruction as Instruction>::Reg>,
{
fn read_vregs(&self) -> &VectorRegisterFile<{ Self::VLENB as usize }> {
fn read_vregs(&self) -> &VectorRegisterFile<{ Self::VLENB }> {
&self.vregs
}

fn write_vregs(&mut self) -> &mut VectorRegisterFile<{ Self::VLENB as usize }> {
fn write_vregs(&mut self) -> &mut VectorRegisterFile<{ Self::VLENB }> {
&mut self.vregs
}

Expand Down
2 changes: 1 addition & 1 deletion crates/execution/ab-riscv-act4-runner/src/instruction.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ use std::ops::ControlFlow;
pub(crate) enum MachineModePlaceholder<Reg> {}

#[instruction]
impl<Reg> const Instruction for MachineModePlaceholder<Reg>
const impl<Reg> Instruction for MachineModePlaceholder<Reg>
where
Reg: [const] Register,
{
Expand Down
30 changes: 22 additions & 8 deletions crates/execution/ab-riscv-act4-runner/src/main.rs
Original file line number Diff line number Diff line change
@@ -1,11 +1,14 @@
#![expect(incomplete_features, reason = "generic_const_exprs")]
#![expect(incomplete_features, reason = "generic_const_*")]
#![feature(
const_cmp,
const_trait_impl,
const_try,
const_try_residual,
generic_const_exprs,
generic_const_args,
generic_const_items,
inherent_associated_types,
iter_array_chunks,
min_generic_const_args,
signed_bigint_helpers,
try_blocks
)]
Expand Down Expand Up @@ -42,6 +45,8 @@ const RAM_BASE: u64 = 0x8000_0000;
const RAM_SIZE: usize = 0x80000;
const MRET_INSTRUCTION: u32 = 0x3020_0073;

type const SIZE_OF<T>: usize = const { size_of::<T>() };
Comment thread
nazar-pc marked this conversation as resolved.
Comment thread
nazar-pc marked this conversation as resolved.

/// RISC-V ISA
#[derive(Debug, Clone, Copy, ValueEnum)]
enum Isa {
Expand Down Expand Up @@ -443,7 +448,7 @@ fn run_rv32i_max_test(
}
}

check_signature(&elf, &state.memory)
check_signature::<_, _, 4, _>(&elf, &state.memory)
}

// TODO: It doesn't seem to be possible to make this generic over the instruction type at the moment
Expand Down Expand Up @@ -576,16 +581,15 @@ fn run_rv64i_max_test(
}
}

check_signature(&elf, &state.memory)
check_signature::<_, _, 8, _>(&elf, &state.memory)
}

fn check_signature<const RAM_BASE: u64, const RAM_SIZE: usize, Reg>(
fn check_signature<const RAM_BASE: u64, const RAM_SIZE: usize, const SIZE_OF_REG: usize, Reg>(
elf: &ParsedElf<Reg>,
memory: &BasicMemory<RAM_BASE, RAM_SIZE>,
) -> Result<(), TestError<Reg::Type>>
where
Reg: Register<Type: BasicInt>,
[(); size_of::<Reg::Type>()]:,
{
let Some(tohost) = memory.tohost_value::<Reg::Type>(elf.tohost_addr)? else {
return Err(TestError::Test(anyhow::anyhow!(
Expand Down Expand Up @@ -624,10 +628,17 @@ where
});
}

// TODO: Using `SIZE_OF::<Reg::Type>` causes ICE:
// https://github.com/rust-lang/rust/issues/156744
assert_eq!(SIZE_OF::<Reg::Type>, SIZE_OF_REG);

for (word, (actual, expected)) in actual_signature
.iter()
.copied()
.array_chunks::<{ size_of::<Reg::Type>() }>()
// TODO: Using `SIZE_OF::<Reg::Type>` causes ICE:
// https://github.com/rust-lang/rust/issues/156744
// .array_chunks::<{ SIZE_OF::<Reg::Type> }>()
.array_chunks::<SIZE_OF_REG>()
.map(|bytes| {
// SAFETY: Correct size with all bit patterns being valid
unsafe { bytes.as_ptr().cast::<Reg::Type>().read_unaligned() }
Expand All @@ -636,7 +647,10 @@ where
expected_signature
.iter()
.copied()
.array_chunks::<{ size_of::<Reg::Type>() }>()
// TODO: Using `SIZE_OF::<Reg::Type>` causes ICE:
// https://github.com/rust-lang/rust/issues/156744
// .array_chunks::<{ SIZE_OF::<Reg::Type> }>()
.array_chunks::<SIZE_OF_REG>()
.map(|bytes| {
// SAFETY: Correct size with all bit patterns being valid
unsafe { bytes.as_ptr().cast::<Reg::Type>().read_unaligned() }
Expand Down
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