[doc] Update signoff checklist + add template#572
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Signed-off-by: martin-velay <mvelay@lowrisc.org>
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Definitely useful. I had a slightly different approach see: #574
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Initial review.
| | TESTPLAN_REVIEWED | *Both* | Review the software tests proposed by the testplan. | | ||
| | TB_DUT_CONNECTED | *Both* | DUT instantiated in the testbench top with all major interfaces hooked up. | | ||
| | SIM_ASSERTIONS_ADDED | *Simulation* | Interface assertion monitors hooked up; X/unknown checks on DUT outputs added. | | ||
| | SIM_COVERAGE_MODEL_ADDED | *Simulation* | Initial functional coverage model added to the testbench environment. | |
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This is a V2 item.
| | DESIGN_SPEC_REVIEWED | *Both* | Review the design specification. | | ||
| | TESTPLAN_REVIEWED | *Both* | Review the software tests proposed by the testplan. | | ||
| | TB_DUT_CONNECTED | *Both* | DUT instantiated in the testbench top with all major interfaces hooked up. | | ||
| | SIM_ASSERTIONS_ADDED | *Simulation* | Interface assertion monitors hooked up; X/unknown checks on DUT outputs added. | |
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The output known is part of the D1 sign-off.
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| [DV_DOC_DRAFT_COMPLETED]: stages.md#v1-verification-sign-off-checklist | ||
| [TESTPLAN_COMPLETED]: stages.md#v1-verification-sign-off-checklist | ||
| [DESIGN_SPEC_REVIEWED]: stages.md#v1-verification-sign-off-checklist | ||
| [TESTPLAN_REVIEWED]: stages.md#v1-verification-sign-off-checklist | ||
| [PRE_VERIFIED_SUB_MODULES_V1]: stages.md#v1-verification-sign-off-checklist | ||
| [TB_DUT_CONNECTED]: stages.md#v1-verification-sign-off-checklist | ||
| [SIM_COVERAGE_MODEL_ADDED]: stages.md#v1-verification-sign-off-checklist | ||
| [SIM_ASSERTIONS_ADDED]: stages.md#v1-verification-sign-off-checklist | ||
| [SIM_SMOKE_TEST_PASSING]: stages.md#v1-verification-sign-off-checklist | ||
| [SIM_SMOKE_REGRESSION_SETUP]: stages.md#v1-verification-sign-off-checklist | ||
| [SIM_NIGHTLY_REGRESSION_SETUP]: stages.md#v1-verification-sign-off-checklist | ||
| [FPV_MAIN_ASSERTIONS_PROVEN]: stages.md#v1-verification-sign-off-checklist | ||
| [FPV_REGRESSION_SETUP]: stages.md#v1-verification-sign-off-checklist |
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All the same link, I did this differently in the UART D1 sign-off PR.
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While doing the 1st V1 signoff (see this PR #573), I found more convenient to add some items to the list and create a template for future signoffs.