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llvm / circt Public

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[SimToSV] Lower sim.triggered to sv.always#10490

Merged

fzi-hielscher merged 10 commits into

llvm:mainllvm/circt:mainfrom

nanjo712:feat/sim-triggered-lowernanjo712/circt:feat/sim-triggered-lowerCopy head branch name to clipboard

May 16, 2026

Conversation Commits10 (10)Checks Files changed

Merged

[SimToSV] Lower sim.triggered to sv.always#10490
fzi-hielscher merged 10 commits into
llvm:mainfrom
nanjo712:feat/sim-triggered-lower

Commits

Commits on May 16, 2026

[SimToSV] Lower sim.triggered to sv.always
nanjo712
committed
fix format error
nanjo712
committed
update the test
nanjo712
committed
add SYNTHESIS guard
nanjo712
committed
create a dedicated guard pre triggererOp
nanjo712
committed
fix format
nanjo712
committed
add test triggered_with_pause
nanjo712
committed
skil sim.trigger in moveOpsIntoIfdefGuardsAndProcesses
nanjo712
committed
remove the mlir qualifier
nanjo712
committed
using namespace mlir
nanjo712
committed

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