Skip to content

[ImportVerilog] Remove unneeded asserts

19b380f
Select commit
Loading
Failed to load commit list.
Sign in for the full log view
Open

[ImportVerilog] Preserve declaration order across regular and interface-modport ports #10468

[ImportVerilog] Remove unneeded asserts
19b380f
Select commit
Loading
Failed to load commit list.

Annotations

1 warning
Sanity Check
succeeded May 27, 2026 in 34s