fix(): Review blockout followups

cores/blkout/cfg/files.yaml

@@ -1,6 +1,9 @@
 blkout:
   - get:
+    - jtblkout_colmix.v
+    - jtblkout_frontcol_mmr.v
     - jtblkout_game.v
+    - jtblkout_header.v
     - jtblkout_main.v
     - jtblkout_video.v
     - jtblkout_fb.v
@@ -13,18 +16,19 @@ dd2:
 jtframe:
   - get:
       - jtframe_ff.v
+      - jtframe_edge.v
   - from: ram
     get:
       - jtframe_dual_ram.v
-      - jtframe_rpwp_ram.v      # used by jtframe_linebuf
+      - jtframe_rpwp_ram.v
   - from: clocking
     get:
       - jtframe_frac_cen.v
       - jtframe_gated_cen.v
   - from: video
     get:
       - jtframe_vtimer.v
-      - jtframe_linebuf.v       # fb + overlay double line buffers
+      - jtframe_linebuf.v
   - from: cpu
     get:
       - jtframe_m68k.yaml

cores/blkout/cfg/macros.def

@@ -1,9 +1,6 @@
-# NOT READY YET
-JTFRAME_SKIP
-
 CORENAME=JTBLKOUT
 JTFRAME_CLK24
-
+JTFRAME_RATE=58.09
 JTFRAME_WIDTH=320
 JTFRAME_HEIGHT=240
 JTFRAME_COLORW=4
@@ -13,6 +10,8 @@ JTFRAME_PXLCLK=8
 JTFRAME_BUTTONS=4
 JTFRAME_JOY_DULR
 
+JTFRAME_HEADER=4
+
 JTFRAME_BA1_START=0x040000
 PCM_START=0x048000
 JTFRAME_BA2_START=0x100000

cores/blkout/cfg/mame2mra.toml

@@ -1,12 +1,23 @@
 [global]
-author=["jotego"]
+author=["Andrea Bogazzi"]
 
 [parse]
 sourcefile=[ "blockout.cpp" ]
+skip.setnames=["agress", "agressb"]
+
+[header]
+info = """ Header to identify the PCB type
+        Byte 0 = 0 for blockout, 1 for blockoutj
+"""
+registers=[
+    { name="blockout",    pos="0[0]",   desc="Blockout",   values=[{ setnames=["blockout","blockout2","blockout3"], value=1 }] },
+    { name="blockoutj",    pos="0[1]",   desc="Blockoutj",  values=[{ setname="blockoutj", value=1 }] },
+]
 
 [buttons]
 names=[
-    { names="A,B,C,Drop" }
+    { setnames=["blockout","blockout2","blockout3"], names="A,B,C,Drop"},
+    { setname="blockoutj", names="Drop,B,C"}
 ]
 
 [dipsw]
@@ -17,6 +28,7 @@ regions = [
     { name="maincpu",  width=16, reverse=true, no_offset=true },
     { name="audiocpu", start="JTFRAME_BA1_START" },
     { name="oki",      start="PCM_START" },
+    { name="proms", skip=true },
 ]
 
 order = [ "maincpu", "audiocpu", "oki" ]

cores/blkout/cfg/mem.yaml

@@ -1,3 +1,6 @@
+params:
+  - { name: PCM_OFFSET, value: "(`PCM_START-`JTFRAME_BA1_START)>>1" }
+
 clocks:
   clk24:
     - freq: 3579545
@@ -16,83 +19,75 @@ audio:
   channels:
     # as dd2 no schematics, assuming same for dd2 - unverified
     - { name: fm,  module: jt51,   rsum: 30k }
-    - { name: pcm, module: jt6295, rsum: 10k }
-
-params:
-  - { name: PCM_OFFSET, value: "(`PCM_START-`JTFRAME_BA1_START)>>1" }
+    - { name: pcm, module: jt6295, rsum: 10k, fir: fir_192k_4k.csv }
 
 sdram:
   banks:
     # ── Bank 0 ── 68k program ROM (256 KB, 16-bit) ──────────────────────────
     - buses:
       - name: main
-        addr_width: 18      # [17:1] word addr = 256 KB
+        addr_width: 18
         data_width: 16
 
     # ── Bank 1 ── Z80 audio ROM (32 KB) + OKI samples (128 KB / 256 KB region) ─
     - buses:
       - name: snd
-        addr_width: 15      # 32 KB
+        addr_width: 15
         data_width: 8
       - name: pcm
-        addr_width: 18      # 256 KB oki region (128 KB loaded, MRA pads)
+        addr_width: 18
         data_width: 8
         offset: PCM_OFFSET
 
     # ── Bank 2 ── back framebuffer (256 KB, R/W) ────────────────────────────
-    # Two byte-per-pixel 512x256 planes (front @0, back @0x20000). Own bank so
-    # the per-line video fetch never contends with program ROM or OKI samples.
     - buses:
       - name: fbram
-        addr_width: 18      # [17:1] word addr = 128K x 16 = 256 KB
+        addr_width: 18
         data_width: 16
         rw: true
-        cs: fbram_sel       # must differ from the bus's auto 'fbram_cs'
+        cs: fbram_sel
         din: cpu_dout
       - name: fbrd
         addr_width: 18
         data_width: 16
 
     # ── Bank 3 ── 68k work RAM 0x208000-0x21ffff (128 KB, R/W) ──────────────
-    # Kept out of BRAM (128 M10K) for smaller platforms
     - buses:
       - name: work3
-        addr_width: 17      # [16:1] word addr = 64K x 16 = 128 KB
+        addr_width: 17
         data_width: 16
         rw: true
-        cs: work3_sel       # must differ from the bus's auto 'work3_cs'
+        cs: work3_sel
         din: cpu_dout
         do_not_erase: true
 
 bram:
   # Work RAM 0x1d0000-0x1dffff (6264). SP=0x1dfffe.
   - name: work
-    addr_width: 16      # [15:1] = 32K words = 64 KB
+    size: 64kB
     data_width: 16
     addr: main_addr[15:1]
     din: cpu_dout
     rw: true
   # Work RAM 0x1f0000-0x1fffff.
   - name: work2
-    addr_width: 16      # [15:1] = 32K words = 64 KB
+    size: 64kB
     data_width: 16
     addr: main_addr[15:1]
     din: cpu_dout
     rw: true
   # Front 1bpp overlay VRAM (0x200000-0x207fff, 32 KB = 16K words).
   - name: fvram
-    addr_width: 15      # 16K words = 32 KB
+    size: 32kB
     data_width: 16
     din: cpu_dout
     addr: main_addr[14:1]
     rw: true
     dual_port:
       name: fvrd
       dout: fvram_data
-  # Palette RAM (0x280200-0x2805ff, 512 x 16). Pen 512 is a separate register.
-  # pal_addr = pen {A[10],A[8:1]} since A[9] is the base bit.
   - name: pal
-    addr_width: 10      # [9:1] = 512 entries
+    size: 1kB
     data_width: 16
     addr: "{main_addr[10], main_addr[8:1]}"
     din: cpu_dout

cores/blkout/cfg/mmr.yaml

@@ -0,0 +1,11 @@
+# 0x280000-0x280003. Only 0x280002 is used: the colour of the 1bpp overlay
+# (pen 512), write only. Kept as an MMR so scene dumps carry it.
+- name: frontcol
+  size: 4
+  dw: 16
+  read_only: true
+  regs:
+    - name: frontcol
+      desc: overlay colour, xBGR-444
+      dw: 12
+      at: "3[3:0],2"

cores/blkout/hdl/jtblkout_colmix.v

@@ -0,0 +1,62 @@
+/*  This file is part of JTCORES.
+    JTCORES program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTCORES program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTCORES.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Andrea Bogazzi. email: andreabogazzi79@gmail.com
+    Version: 1.0
+    Date: 31-7-2026
+*/
+
+module jtblkout_colmix(
+    input               clk,
+    input               pxl_cen,
+    input               LHBL,
+    input               LVBL,
+    input        [11:0] frontcol,
+
+    // bitmap pen, looked up in the palette BRAM
+    input        [ 8:0] fb_pxl,
+    output       [ 8:0] pal_addr,
+    input        [15:0] pal_data,
+
+    // 1bpp overlay: byte from the line buffer plus the bit index within it
+    input        [ 7:0] ovlb_q,
+    input        [ 2:0] hovl,
+
+    input        [ 3:0] gfx_en,     // [0] bitmap, [3] overlay
+    output reg   [ 3:0] red,
+    output reg   [ 3:0] green,
+    output reg   [ 3:0] blue
+);
+
+reg       overlay_1;
+
+assign pal_addr = gfx_en[0] ? fb_pxl : 9'd0;
+// Sample the overlay bit with the same hovl used for the byte address, then
+// register once to line up with fb_pxl.
+always @(posedge clk) if( pxl_cen ) overlay_1 <= gfx_en[3] & ovlb_q[~hovl];   // MSB = leftmost pixel
+
+wire [11:0] color = overlay_1 ? frontcol : pal_data[11:0];  // xBGR-444
+wire blank = ~(LHBL & LVBL);
+always @(posedge clk) if( pxl_cen ) begin
+    if( blank ) begin red<=0; green<=0; blue<=0; end
+    else begin
+        red   <= color[ 3:0];
+        green <= color[ 7:4];
+        blue  <= color[11:8];
+    end
+end
+
+wire _unused = &{1'b0, gfx_en[2:1]};
+
+endmodule

cores/blkout/hdl/jtblkout_fb.v

@@ -12,37 +12,31 @@
     You should have received a copy of the GNU General Public License
     along with JTCORES.  If not, see <http://www.gnu.org/licenses/>.
 
-    Block Out back-framebuffer video fetch (SDRAM domain).
-
-    The 256 KB framebuffer (SDRAM bank 2) holds two byte-per-pixel 512x256
-    planes: front @ word 0x00000, back @ word 0x10000. Word address =
-    {plane, y[7:0], wcol[7:0]}; each 16-bit word packs 2 pixels — even x in the
-    high byte, odd x in the low byte (68k big-endian). Composite per MAME
-    videoram_w: pen = front ? {0,front} : {1,back} (9-bit). A double line buffer
-    is filled a line ahead; scanout reads the displayed half.
+    Author: Andrea Bogazzi. email: andreabogazzi79@gmail.com
+    Version: 1.0
+    Date: 31-7-2026
 */
 
 module jtblkout_fb(
     input               rst,
     input               clk,
     input               pxl_cen,
 
-    input        [ 8:0] hdump,      // 0..511 pixel column
+    input        [ 8:0] hdump,
     input        [ 8:0] vrender,    // line to fetch (1 ahead of display)
     input               HS,
 
-    // SDRAM bank 2 video-read port
     output reg   [17:1] fbrd_addr,
     output reg          fbrd_cs,
     input        [15:0] fbrd_data,
     input               fbrd_ok,
 
-    output reg   [ 8:0] fb_pxl       // 9-bit pen at hdump (0..511)
+    output reg   [ 8:0] fb_pxl       // 9-bit pen at hdump
 );
 
-// Line fetch FSM. Each SDRAM read fully handshakes: assert cs+addr, wait ok,
-// capture, drop cs. Per column: front word, back word, then compose+store 2 px.
 localparam [2:0] IDLE=0, F_REQ=1, F_WAIT=2, B_REQ=3, B_WAIT=4, STORE=5;
+localparam [0:0] FRONT=1'b0, BACK=1'b1;
+
 reg  [ 2:0] st;
 reg         HSl;
 reg  [ 7:0] wcol, fy;
@@ -52,7 +46,7 @@ reg  [ 7:0] lb_wa;
 reg         lb_we;
 wire [17:0] lb_q;
 
-// composite one plane-pair -> 9-bit pen
+// select front or back layers
 function [8:0] compose( input [7:0] f, input [7:0] b );
     compose = f!=8'd0 ? {1'b0,f} : {1'b1,b};
 endfunction
@@ -69,9 +63,9 @@ always @(posedge clk, posedge rst) begin
             wcol <= 0;
             st   <= F_REQ;
         end else case( st )
-            F_REQ:  begin fbrd_addr<={1'b0,fy,wcol}; fbrd_cs<=1; st<=F_WAIT; end
+            F_REQ:  begin fbrd_addr<={FRONT,fy,wcol}; fbrd_cs<=1; st<=F_WAIT; end
             F_WAIT: if( fbrd_ok ) begin front_lat<=fbrd_data; fbrd_cs<=0; st<=B_REQ; end
-            B_REQ:  begin fbrd_addr<={1'b1,fy,wcol}; fbrd_cs<=1; st<=B_WAIT; end
+            B_REQ:  begin fbrd_addr<={BACK,fy,wcol}; fbrd_cs<=1; st<=B_WAIT; end
             B_WAIT: if( fbrd_ok ) begin back_lat<=fbrd_data;  fbrd_cs<=0; st<=STORE; end
             STORE:  begin
                 lb_din <= { compose(front_lat[7:0],  back_lat[7:0] ),    // odd  x
@@ -89,8 +83,6 @@ end
 // read runs 2px ahead so the fb_pxl->rgb pipeline is primed at the first pixel
 wire [8:0] hrd = hdump + 9'd2;
 
-// double line buffer: 256 cols x 2 buffers, 2 pixels/entry. jtframe_linebuf
-// owns the buffer swap (on ~HS falling = HS rising, matching the fetch start).
 jtframe_linebuf #(.DW(18), .AW(8)) u_lbuf(
     .clk     ( clk       ),
     .LHBL    ( ~HS       ),
@@ -102,7 +94,8 @@ jtframe_linebuf #(.DW(18), .AW(8)) u_lbuf(
     .rd_gated(           )
 );
 
-always @(posedge clk) if( pxl_cen )
+always @(posedge clk) if( pxl_cen ) begin
     fb_pxl <= hrd[0] ? lb_q[17:9] : lb_q[8:0];
+end
 
 endmodule