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Feat/configs and interupts#40

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elpiel wants to merge 11 commits intoeupn:masterfrom
LechevSpace:feat/configs-and-interupts
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Feat/configs and interupts#40
elpiel wants to merge 11 commits intoeupn:masterfrom
LechevSpace:feat/configs-and-interupts

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@elpiel elpiel commented Apr 6, 2025

This is continuation of #13 with some additions and organization of the code.

Currently I'm able to write the Enable & Mask Interrupts registries and validate the value (fetching it again from the IC), however, using the GPIO and waiting for Interrupt triggered is not working.

I've also validated the firmware version of the IC for some of the interrupts

Maybe another set of eyes will spot an issue that I'm missing?!

Adds:

Also, should we add functions to fetch sequential registers with other data like quaternion, gravity vector etc?

Here's part of the code where i'm able to set these interrupts and update both the mask and INT_EN + validate the result at the end.

I've set the mode to NDOF (9DOF) first and update the interrupts below.

let interrupts = BNO055Interrupt::ACC_BSX_DRDY
        | BNO055Interrupt::GYR_DRDY
        | BNO055Interrupt::MAG_DRDY;

        if let Err(err) = imu.set_interrupts_enabled(interrupts) {
            error!(
                "(bno055) Failed to enable interrupts for 9DOF + Gyro High Rate for IMU {:?}",
                interrupts
            );
            continue;
        }
        if let Err(err) = imu.set_interrupts_mask(interrupts) {
            error!("(bno055) Failed to set 9DOF + Gyro High Rate interrupt mask for IMU");
            continue;
        }
        info!("(bno055) Interrupts mask set {:?}!", interrupts);

        let int_en = unwrap!(imu.interrupts_enabled());
        let int_mask = unwrap!(imu.interrupts_mask());
        info!(
            "(bno055) Int enabled: {0=0..8}, Interrupts mask {1=0..8} set bits: {2=0..8} !",
            int_en.bits(),
            int_mask.bits(),
            interrupts.bits()
        );

@elpiel
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elpiel commented Apr 11, 2025

Bug: setting up the Accelerometer configuration, makes the sensor return an error.

Primarily I tried to set the range to +- 16G

@eupn eupn requested review from Copilot and eupn April 11, 2025 11:07
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Copilot reviewed 5 out of 5 changed files in this pull request and generated 1 comment.

Comments suppressed due to low confidence (1)

src/regs.rs:87

  • The constant BNO055_SYS_TRIGGER_RST_INT_BIT has the same value (0x40) as BNO055_TEMP_SOURCE defined later, which could lead to confusion or potential errors if these registers are expected to be distinct.
pub(crate) const BNO055_SYS_TRIGGER_RST_INT_BIT: u8 = 0x40; // Clear interrupts command

Comment thread src/gyr_config.rs
Comment on lines +151 to +158
impl From<u8> for GyrAmSamplesAwake {
fn from(regval: u8) -> Self {
match regval {
0 => Self::Samples8,
1 => Self::Samples16,
2 => Self::Samples32,
3 => Self::Samples64,
_ => Self::Samples8, // TODO: handle error case?
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The default branch in the match for GyrAmSamplesAwake silently falls back to Samples8. Consider returning a Result or adding explicit error handling to avoid masking potential invalid register values.

Suggested change
impl From<u8> for GyrAmSamplesAwake {
fn from(regval: u8) -> Self {
match regval {
0 => Self::Samples8,
1 => Self::Samples16,
2 => Self::Samples32,
3 => Self::Samples64,
_ => Self::Samples8, // TODO: handle error case?
impl TryFrom<u8> for GyrAmSamplesAwake {
type Error = Error;
fn try_from(regval: u8) -> Result<Self, Self::Error> {
match regval {
0 => Ok(Self::Samples8),
1 => Ok(Self::Samples16),
2 => Ok(Self::Samples32),
3 => Ok(Self::Samples64),
_ => Err(Error::InvalidGyrAmSamplesAwake(regval)),

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Yes, I believe we should rewrite this part accordingly with bitfield instead.

Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
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3 participants