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Feature: BMPv3 support#2197

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dragonmux wants to merge 61 commits intomainfrom

feature/bmpv3-support

Commits on Feb 22, 2026

bmp-v3: Roughly implemented the SWDIO drive mode switch macros
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bmp-v3: Added configuration for the SWO pin
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bmp-v3: Defined the DMA setup for the SWO and AUX UART subsystems
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common/aux_serial: Implemented support for sourcing data from two UARTs and switching between them automatically
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bmp-v3: Added a linker script for the platform
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common/aux_serial: Built out DMA configuration for the STM32U5 as it's quite different to the other platforms
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ch32vx: Gate the read Flash size function properly on whether DEBUG_INFO does anything to avoid unused warnings
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common/swo_uart: Built out DMA configuration for the STM32U5 as it's quite different to the other platforms
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common/swo_manchester: Handle the STM32U5 timer input multiplexing properly
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meson: Added the new BMPv3 platform to the build system, integrating a suitable cross file too
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bmp-v3: Begun implementing the platform-specific functions
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native: Removed a duplicated include line
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native: Fixed up the copyright header
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bmp-v3: Defined the first part of platform initialisation, bringing up USB, timing, and setting up the correct vector table address
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stlinkv3: Removed a duplicated include line
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native: Added some `const` to the ADC code the updated locm3 allows
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bmp-v3: Implemented target voltage readout using the ADCs and tpwr sense pin
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bmp-v3: Implemented bringup of the various core peripherals and clocking
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bmp-v3: Implemented the boot request logic
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bmp-v3: Implemented handling for the hardware version info
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bmp-v3: Fleshed out GPIO configuration and bringup
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bmp-v3: Defined clocking for the platform
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bmp-v3: Built out the bootloader for the platform
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common: Built a new, more suitable bootloader backend for the STM32U5
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common: Enabled the STM32U5 in the core DFU bootloader
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common: Cleaned up the core DFU bootloader using the buffer_utils header
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bmp-v3: Initialise the UART subsystem and configure the UART pins appropriately
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misc: Turn off a clang-analyzer-core lint that we cannot avoid due to writing firmware
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bmp-v3: Initialise the LED pins so we can see the GDB machinary state
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common: Enable the USB DFU stub to properly reboot cores that are ARMv8-M main profile
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common/usb_serial: Cleanup to improve nomenclature consistency and readability in the USB configuration setup code
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common/stm32/gdb_if: Upgraded the receive callback mechanism with proper use of atomics, resulting in smaller and more correct code
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common/stm32/gdb_if: Nomenclature fixes to make things easier to read and track
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common/usb_serial: Fixed some clang-tidy lints
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common/ctxlink/gdb_if: Upgraded the receive callback mechanism with proper use of atomics, resulting in smaller and more correct code
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common/usb_descriptors: Switch to a 125ms polling interval for state change notifications so it's a little more responsive without being overwhelming for traffic
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bmp-v3: Implemented target power support
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bmp-v3: Refactor the GPIO init into its own function
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bmp-v3: More GPIO initialisation work, making sure nRST is bought up correctly and the pins are driven suitably hard
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native: Fixed up some nomenclature and warnings in the tpwr voltage read machinary
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bmp-v3: Handle proper initialisation of the bus direction pins
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bmp-v3: Defined the pin setup for the QSPI Flash memory interface to the on-board Flash
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common/swdptap: Small tweak to where the read happens in the I/O cycle for SWD in
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common/aux_serial: Implemented more of the multi-UART logic for hooking the dual target serial interfaces up to the second host serial interface
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common/aux_serial: Handle errors that can occur on the UARTs so DMA doesn't get upset by them
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common/aux_serial: More tweaks for the IRQ handling to make things safer and more reasonable
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common/aux_serial: Fixed an order of includes error that meant certain steering macros weren't available when they should be
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common/aux_serial: Impelemented the UART1 half of the switchable UART mechanism using the EXTI
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common/aux_serial: Roughly implemented the UART2 half of the switchable UART mechanism using the EXTI
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bmp-v3: Implemented platform support for UART RX/TX switching for the second UART
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common/timing_stm32: Implemented handling for seeing which way around the UART needs to be switched by toggling the direction signal on the level translation once every 10ms
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bmp-v3: Implemented logic for enabling and disabling the secondary UART appropriately based on state changes
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Commits on Feb 23, 2026

github: Enabled BMPv3 in both the PR and build-and-upload flows
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f072/atomic: Implemented compare-exchange and fetch-add for 32-bit unsigned values
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Commits

Commits on Feb 19, 2026

Commits on Feb 22, 2026

Commits on Feb 23, 2026