Add Walnut Pi Box (CM1) and 1B DDR3 variant - #10342
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📝 WalkthroughWalkthroughAdds support for four Allwinner H618 Walnut Pi boards. The change adds board metadata, Linux device trees and overlays for kernel 6.18 and 7.0, SSD130X modules, and U-Boot device trees and defconfigs. ChangesWalnut Pi H618 platform support
Estimated code review effort: 4 (Complex) | ~60 minutes Possibly related PRs
Suggested labels: Suggested reviewers: 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches 💡 1🛠️ Fix failing CI checks 💡
🧪 Generate unit tests (beta)
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🚫 Missing required board assetsThis PR adds new board configuration(s). Required assets must already exist in github/armbian/armbian.github.io.
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Actionable comments posted: 3
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi`:
- Around line 100-106: The wifi_pwrseq nodes use an unsupported clock name and
omit the required 32kHz fanout pinctrl. In both
patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi:100-106 and
patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi.dtsi:100-106, update
wifi_pwrseq to use clock-names "ext_clock" and add the default pinctrl
referencing x32clk_fanout_pin, keeping both kernel trees identical.
In
`@patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch`:
- Around line 184-190: Add the upstream H616 DDR3-1333 default for
CONFIG_DRAM_CLK alongside CONFIG_DRAM_SUNXI_TPR6 in the WalnutPi 1B DDR3
defconfig, ensuring it matches the corresponding upstream configuration; if the
platform requires a different clock, explicitly document that intentional
override.
In
`@patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b/001-walnutpi-1b-dts-and-defconfig.patch`:
- Around line 149-157: Enable the &spi0 controller wherever the SPI NOR flash@0
node is retained by adding status = "okay" in
patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b/001-walnutpi-1b-dts-and-defconfig.patch
lines 149-157,
patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch
lines 150-158,
patch/u-boot/v2026.07-sunxi64/board_walnutpi-box/001-walnutpi-box-dts-and-defconfig.patch
lines 160-168, and
patch/u-boot/v2026.07-sunxi64/board_walnutpi-zerow/001-walnutpi-zerow-dts-and-defconfig.patch
lines 149-157. If any corresponding board has no SPI NOR hardware, remove its
flash@0 node and SPI flash defconfig symbols instead.
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📒 Files selected for processing (26)
config/boards/walnutpi-1b-ddr3.cscconfig/boards/walnutpi-1b.cscconfig/boards/walnutpi-box.cscconfig/boards/walnutpi-zerow.cscconfig/kernel/linux-sunxi64-current.configconfig/kernel/linux-sunxi64-edge.configpatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-1b.dtspatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-box.dtspatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-cm1.dtsipatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-zerow.dtspatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsipatch/kernel/archive/sunxi-6.18/overlay_64/Makefilepatch/kernel/archive/sunxi-6.18/overlay_64/sun50i-h616-walnutpi-box-oled.dtsopatch/kernel/archive/sunxi-6.18/overlay_64/sun50i-h616-walnutpi-zerow-expansion.dtsopatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-1b.dtspatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-box.dtspatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-cm1.dtsipatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-zerow.dtspatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi.dtsipatch/kernel/archive/sunxi-7.0/overlay_64/Makefilepatch/kernel/archive/sunxi-7.0/overlay_64/sun50i-h616-walnutpi-box-oled.dtsopatch/kernel/archive/sunxi-7.0/overlay_64/sun50i-h616-walnutpi-zerow-expansion.dtsopatch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patchpatch/u-boot/v2026.07-sunxi64/board_walnutpi-1b/001-walnutpi-1b-dts-and-defconfig.patchpatch/u-boot/v2026.07-sunxi64/board_walnutpi-box/001-walnutpi-box-dts-and-defconfig.patchpatch/u-boot/v2026.07-sunxi64/board_walnutpi-zerow/001-walnutpi-zerow-dts-and-defconfig.patch
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All three findings are addressed in the current revision: the wifi_pwrseq clock-name/pinctrl fix and the 1b spi0 removal came in via the base branch (710dbcf), and the box/1b-ddr3 u-boot spi0 nodes are dropped in a4e6c79 (SPI-NOR pads are unpopulated on all these boards, so the nodes are removed rather than enabled). |
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Actionable comments posted: 1
♻️ Duplicate comments (1)
patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch (1)
178-181: 🗄️ Data Integrity & Integration | 🟡 Minor | ⚡ Quick winSet
CONFIG_DRAM_CLKexplicitly for the DDR3-1333 profile.
configs/walnutpi_1b_ddr3_defconfigselectsCONFIG_SUNXI_DRAM_H616_DDR3_1333=ybut does not setCONFIG_DRAM_CLK. The H616 Kconfig default then applies. The sunxi DRAM clock default lives inarch/arm/mach-sunxi/Kconfig, and the H616 default is higher than the DDR3-1333 rating, so the DDR3 devices can run out of specification. The commit message states that the default clock is intentional, so record the exact value instead.Add the clock value used by the upstream H616 DDR3-1333 defconfigs, or state the resolved default value in the commit message. DDR3 bring-up is still pending, so this affects the first boot attempt on real hardware.
Run the following script to read the default and the values other H616 DDR3 targets use:
#!/bin/bash # Description: Compare DRAM_CLK usage across sunxi64 U-Boot defconfig patches. set -uo pipefail echo "== DRAM_CLK in U-Boot board patches ==" rg -n --glob 'patch/u-boot/**' 'CONFIG_DRAM_CLK|SUNXI_DRAM_H616_DDR3_1333|SUNXI_DRAM_H616_LPDDR4'🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch` around lines 178 - 181, Add an explicit CONFIG_DRAM_CLK assignment to the walnutpi_1b_ddr3_defconfig alongside CONFIG_SUNXI_DRAM_H616_DDR3_1333, using the exact value from upstream H616 DDR3-1333 defconfigs or the resolved H616 Kconfig default. Ensure the committed configuration records the intended DDR3-safe clock instead of relying on the implicit default.
🧹 Nitpick comments (2)
patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi (1)
322-333: 📐 Maintainability & Code Quality | 🔵 Trivial | 💤 Low valueBoth kernel trees keep a disabled
spi0with a SPI-NOR child. The shared root cause is that the SPI-NOR description was removed from the U-Boot device trees but kept in the shared kernel DTSI. The node also has no pinctrl group, sostatus = "okay"alone cannot enable it.
patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi#L322-L333: delete the&spi0override, or addpinctrl-0 = <&spi0_pins>.patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi.dtsi#L322-L333: apply the identical change.🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi` around lines 322 - 333, Remove the disabled &spi0 override containing the SPI-NOR child, or add the spi0_pins pinctrl group to it, in both patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi lines 322-333 and patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi.dtsi lines 322-333; apply the identical fix in both files.patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch (1)
183-195: 📐 Maintainability & Code Quality | 🔵 Trivial | ⚡ Quick winBoth new defconfigs keep SPI flash options without a
spi0node. The shared root cause is that the SPI-NOR nodes were removed from the U-Boot device trees while the SPI and MTD options stayed in the defconfigs.CONFIG_SPI_FLASH_MACRONIXalso has no effect without a SPI flash core option.
patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch#L183-L195: removeCONFIG_SPL_SPI_SUNXI,CONFIG_MTD,CONFIG_SPI_FLASH_MACRONIX, andCONFIG_SPIfromconfigs/walnutpi_1b_ddr3_defconfig.patch/u-boot/v2026.07-sunxi64/board_walnutpi-zerow/001-walnutpi-zerow-dts-and-defconfig.patch#L186-L198: remove the same four options fromconfigs/walnutpi_zerow_defconfig.🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch` around lines 183 - 195, Remove CONFIG_SPL_SPI_SUNXI, CONFIG_MTD, CONFIG_SPI_FLASH_MACRONIX, and CONFIG_SPI from configs/walnutpi_1b_ddr3_defconfig in patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch lines 183-195, and make the same removal from configs/walnutpi_zerow_defconfig in patch/u-boot/v2026.07-sunxi64/board_walnutpi-zerow/001-walnutpi-zerow-dts-and-defconfig.patch lines 186-198; retain the other defconfig options.
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi`:
- Around line 341-345: Resolve the USB port 0 controller conflict by removing
the &ehci0 and &ohci0 overrides or changing &usbotg dr_mode to "host" when the
port is host-only; apply the identical fix in
patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi lines 341-345
and patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi.dtsi lines 341-345
so both trees configure only one USB stack.
---
Duplicate comments:
In
`@patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch`:
- Around line 178-181: Add an explicit CONFIG_DRAM_CLK assignment to the
walnutpi_1b_ddr3_defconfig alongside CONFIG_SUNXI_DRAM_H616_DDR3_1333, using the
exact value from upstream H616 DDR3-1333 defconfigs or the resolved H616 Kconfig
default. Ensure the committed configuration records the intended DDR3-safe clock
instead of relying on the implicit default.
---
Nitpick comments:
In `@patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi`:
- Around line 322-333: Remove the disabled &spi0 override containing the SPI-NOR
child, or add the spi0_pins pinctrl group to it, in both
patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsi lines 322-333
and patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi.dtsi lines
322-333; apply the identical fix in both files.
In
`@patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch`:
- Around line 183-195: Remove CONFIG_SPL_SPI_SUNXI, CONFIG_MTD,
CONFIG_SPI_FLASH_MACRONIX, and CONFIG_SPI from
configs/walnutpi_1b_ddr3_defconfig in
patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patch
lines 183-195, and make the same removal from configs/walnutpi_zerow_defconfig
in
patch/u-boot/v2026.07-sunxi64/board_walnutpi-zerow/001-walnutpi-zerow-dts-and-defconfig.patch
lines 186-198; retain the other defconfig options.
🪄 Autofix
Fix all unresolved CodeRabbit comments on this PR:
- Push a commit to this branch (recommended)
- Create a new PR with the fixes
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📒 Files selected for processing (26)
config/boards/walnutpi-1b-ddr3.cscconfig/boards/walnutpi-1b.cscconfig/boards/walnutpi-box.cscconfig/boards/walnutpi-zerow.cscconfig/kernel/linux-sunxi64-current.configconfig/kernel/linux-sunxi64-edge.configpatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-1b.dtspatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-box.dtspatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-cm1.dtsipatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-zerow.dtspatch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi.dtsipatch/kernel/archive/sunxi-6.18/overlay_64/Makefilepatch/kernel/archive/sunxi-6.18/overlay_64/sun50i-h616-walnutpi-box-oled.dtsopatch/kernel/archive/sunxi-6.18/overlay_64/sun50i-h616-walnutpi-zerow-expansion.dtsopatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-1b.dtspatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-box.dtspatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-cm1.dtsipatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-zerow.dtspatch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi.dtsipatch/kernel/archive/sunxi-7.0/overlay_64/Makefilepatch/kernel/archive/sunxi-7.0/overlay_64/sun50i-h616-walnutpi-box-oled.dtsopatch/kernel/archive/sunxi-7.0/overlay_64/sun50i-h616-walnutpi-zerow-expansion.dtsopatch/u-boot/v2026.07-sunxi64/board_walnutpi-1b-ddr3/001-walnutpi-1b-ddr3-dts-and-defconfig.patchpatch/u-boot/v2026.07-sunxi64/board_walnutpi-1b/001-walnutpi-1b-dts-and-defconfig.patchpatch/u-boot/v2026.07-sunxi64/board_walnutpi-box/001-walnutpi-box-dts-and-defconfig.patchpatch/u-boot/v2026.07-sunxi64/board_walnutpi-zerow/001-walnutpi-zerow-dts-and-defconfig.patch
🚧 Files skipped from review as they are similar to previous changes (22)
- config/boards/walnutpi-1b.csc
- patch/kernel/archive/sunxi-6.18/overlay_64/Makefile
- patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-1b.dts
- patch/kernel/archive/sunxi-6.18/overlay_64/sun50i-h616-walnutpi-zerow-expansion.dtso
- patch/kernel/archive/sunxi-6.18/overlay_64/sun50i-h616-walnutpi-box-oled.dtso
- patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-1b.dts
- patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-box.dts
- patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-box.dts
- patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-zerow.dts
- config/kernel/linux-sunxi64-edge.config
- config/boards/walnutpi-1b-ddr3.csc
- patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-cm1.dtsi
- patch/kernel/archive/sunxi-7.0/overlay_64/sun50i-h616-walnutpi-box-oled.dtso
- patch/kernel/archive/sunxi-7.0/overlay_64/sun50i-h616-walnutpi-zerow-expansion.dtso
- config/kernel/linux-sunxi64-current.config
- config/boards/walnutpi-box.csc
- patch/kernel/archive/sunxi-6.18/dt_64/sun50i-h618-walnutpi-zerow.dts
- patch/kernel/archive/sunxi-7.0/overlay_64/Makefile
- config/boards/walnutpi-zerow.csc
- patch/kernel/archive/sunxi-7.0/dt_64/sun50i-h618-walnutpi-cm1.dtsi
- patch/u-boot/v2026.07-sunxi64/board_walnutpi-1b/001-walnutpi-1b-dts-and-defconfig.patch
- patch/u-boot/v2026.07-sunxi64/board_walnutpi-box/001-walnutpi-box-dts-and-defconfig.patch
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All review-round-2 findings addressed in the pushed revision: ehci0/ohci0 now stay disabled with peripheral usbotg (shared kernel dtsi + all four u-boot DTs; the Box keeps ehci2/3 as its routed ports), the leftover SPL_SPI/MTD/SPI-flash defconfig symbols are dropped, and walnutpi_1b_ddr3 sets CONFIG_DRAM_CLK=792 explicitly (H616 default is 720; vendor u-boot and orangepi_zero2 both use 792). U-Boot build-verified for zerow and 1b-ddr3. |
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nice and clean 👍 |
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Thanks! Status on both conditions:
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added 10 commits
August 6, 2026 07:14
Add CSC board support for the Walnut Pi 1 family (Allwinner H618, LPDDR4, AXP313a, UWE5622 Wi-Fi/BT on SDIO, in-SoC AC300-class EPHY): - walnutpi-box: CM1 compute module on the Box IO carrier (eMMC, full-size HDMI, 100M Ethernet, 2x USB-A on USB2/USB3, carrier heartbeat LED on PC13, user key on PC12, USB1 unrouted/disabled) - walnutpi-1b: SBC variant (micro HDMI, Ethernet, PC16-gated USB VBUS, status LED on PC13, no eMMC) - walnutpi-zerow: compact variant; Ethernet/USB2+3/line-out/IR live on the FPC expansion board and are enabled at runtime via the new sun50i-h616-walnutpi-zerow-expansion overlay Kernel DTs share a common sun50i-h618-walnutpi.dtsi (family core: PMIC, SD, Wi-Fi, eMMC pads, HDMI, emac1 + AC300 EPHY with the SID 0x2c calibration cell, codec, IR, USB, PWM5 EPHY clock), with thin per-board files; dropped into dt_64 for sunxi-6.18 and sunxi-7.0. Wiring is taken from the vendor DTs and schematics; regulator rails and voltages match the vendor SPL (AXP313a: dcdc1 gpu, dcdc2 cpu 0.9V, dcdc3 dram 1.1V). U-Boot (v2026.07) per-board patches add defconfigs with the vendor's LPDDR4 DRAM parameters converted to the generic DRAM_SUNXI_* symbols; the Box defconfig sets MMC_SUNXI_SLOT_EXTRA=2 so SPL can boot from eMMC after armbian-install. All three boards build to working trixie images; hardware bring-up pending.
The 1GB 1B variant uses DDR3 (2x 512MB per the vendor schematic) and needs its own u-boot DRAM profile; mainline has no equivalent of the vendor's DDR3/LPDDR4 auto-detect option.
The 1GB 1B uses 2x 512MB DDR3 instead of LPDDR4 (vendor schematic walnutpi-1b-1g). The defconfig ports the vendor u-boot's DDR3_LPDDR4_AUTO DDR3 path to the upstream DDR3-1333 profile: shared DRAM parameter set, DDR3-specific tpr10=0xf83438 (hardcoded in the vendor auto-detect), TPR6 low byte consumed by the DDR3 path. Same kernel DTB as walnutpi-1b.
Enable the ssd130x DRM driver (I2C) as modules and add an overlay for the Walnut Pi Box 0.96" OLED header: SSD1306 128x64 at 0x3c on TWI2/i2c2 (PI9/PI10, shared with 40-pin pins 27/28; uart3 muxes the same pins and is disabled by the overlay). The display shows up as a DRM device usable by fbcon or any DRM client.
First hardware boot failed DRAM training ('This DRAM setup is
currently not supported' from mctl_auto_detect_rank_width after all
rank/width attempts failed). Cause: LPDDR4-oriented values carried
from the vendor's shared parameter set — ODT_EN=0xaaaaeeee and
nonzero TPR11/TPR12 — poison the mainline DDR3 path. Switch to the
upstream-proven H616 DDR3-1333 set as used by orangepi_zero2
(default ODT_EN=0x1, TPR11/12=0, default clock, TPR6=0x33808080).
Hardware bring-up on a current-production 1GB 1B: the board is a newer LPDDR4 revision (DDR3 training fails, LPDDR4 boots to Armbian), so walnutpi-1b covers all LPDDR4 boards (1G/2G/4G, size auto-detected). Rename walnutpi-1b-1g to walnutpi-1b-ddr3: memory type, not capacity, is what distinguishes the early DDR3 revision. DDR3 variant remains hardware-untested.
The bare ZeroW has two USB-C connectors: USB0 (OTG/power) and USB1, per the vendor schematic (TYPE-C block with its own CC network and TP8/TP9 test pads) and board silkscreen. Re-enable ehci1/ohci1; only Ethernet/USB2/USB3/audio/IR stay on the FPC expansion overlay.
Keep the initial submission to the hardware-tested boards (1B, ZeroW); the Box/CM1 (with its OLED support) and the untested 1B DDR3 variant move to a stacked branch.
- wifi_pwrseq: use the binding's required "ext_clock" clock-name and mux the RTC 32k fanout pin, as on bananapi-m4; with the previous vendor-derived "osc32k-out" name the pwrseq driver silently skipped the clock. - u-boot DTs: drop the &spi0/flash node — the SPI-NOR pads are unpopulated on these boards and the node was declared without enabling or pinmuxing the bus.
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Note GitHub couldn't provide a complete incremental comparison for this pull request, so CodeRabbit is performing a full review instead. This review may take a little longer. |
…ed SPI symbols PHY0 is shared between the MUSB OTG controller and ehci0/ohci0; with usbotg in peripheral mode the host pair stays disabled (as on orangepi-zero2). Applied in the shared kernel dtsi and the u-boot board DTs (ehci1/ohci1 remain for the real ports). Also drop the SPL_SPI/MTD/SPI-flash defconfig symbols left over from the removed SPI-NOR node — the flash pads are unpopulated.
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August 6, 2026 09:42
The asset check derives the vendor logo filename from BOARD_VENDOR; walnut-logo.png is what is merged in armbian.github.io.
Stacked on the initial Walnut Pi family submission: - walnutpi-box: CM1 compute module on the Box IO carrier (eMMC, HDMI, 100M Ethernet, 2x USB-A, carrier LED/key), plus ssd130x DRM support and the walnutpi-box-oled overlay for its 0.96" OLED header. Build-tested; hardware bring-up pending. - walnutpi-1b-ddr3: early 1B revision with 2x 512MB DDR3 (per vendor schematic v1.0), upstream-proven H616 DDR3-1333 DRAM profile. Untested on hardware; current-production 1GB boards are LPDDR4 and covered by walnutpi-1b.
Same cleanup as the base PR: SPI-NOR pads are unpopulated and the nodes were declared without enabling the bus.
Box keeps ehci2/ohci2+ehci3/ohci3 (its routed ports; USB1 is unconnected on the Box carrier).
The H616 Kconfig default is 720; the vendor u-boot and the upstream DDR3 reference (orangepi_zero2) both run 792. Make it explicit rather than silently inheriting the lower default.
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✅ This PR has been reviewed and approved — all set for merge! |
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Summary
Stacked on #10341 (only the last commit is new here; the rest merges with that PR):
walnutpi-box— CM1 compute module on the Box IO carrier (eMMC, HDMI, 100M Ethernet, 2x USB-A, carrier LED/key). Includes ssd130x DRM support (new kernel config modules) and awalnutpi-box-oledoverlay for the carrier's 0.96" SSD1306 header.walnutpi-1b-ddr3— early 1B revision with 2x 512MB DDR3 (vendor schematic v1.0), using the upstream-proven H616 DDR3-1333 profile. Current-production 1GB boards are LPDDR4 and usewalnutpi-1b.Testing
Build-tested; Box hardware bring-up pending, DDR3 revision untested.
Summary by CodeRabbit