Expose set_aie_stream() on IRON ObjectFifo class#2971
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RobinMelhuish wants to merge 2 commits intoXilinx:mainfrom
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Expose set_aie_stream() on IRON ObjectFifo class#2971RobinMelhuish wants to merge 2 commits intoXilinx:mainfrom
RobinMelhuish wants to merge 2 commits intoXilinx:mainfrom
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Add set_aie_stream(stream_end, stream_port) method to the IRON-level ObjectFifo class, plumbing through to the existing low-level object_fifo.set_aie_stream() during resolve(). This allows IRON designs to use Core stream ports instead of DMA channels for ObjectFifo connections, enabling tiles with more than 2 input data flows (2 DMA + N stream ports). The low-level dialect already supports aie_stream (PR Xilinx#2693) but it was not exposed at the IRON Python API level.
When aie_stream is set on an ObjectFIFO endpoint, that endpoint uses a Core stream port instead of a DMA channel. The DMA channel allocation in assignDMAChannelIndices() was not checking for this attribute, causing stream-port FIFOs to consume DMA channel slots. This led to false number of input DMA channel exceeded errors when mixing stream and DMA ObjectFIFOs on tiles that would otherwise have sufficient DMA channels. Skip DMA channel allocation for: - Producers with aie_stream = 0 or 2 (producer uses Core stream port) - Consumers with aie_stream = 1 or 2 (consumer uses Core stream port) The downstream flow creation code (lines 2096+) already correctly handles stream vs DMA routing independently, so skipping the allocation is safe.
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Pull request overview
Exposes stream-port configuration for IRON ObjectFifo by adding set_aie_stream(stream_end, stream_port) and plumbing it through resolve() to the existing low-level aie.objectfifo attributes, enabling Core stream port connections instead of DMA channels.
Changes:
- Add IRON-level
ObjectFifo.set_aie_stream()API and store stream configuration on the object. - Apply the stored stream configuration during
ObjectFifo.resolve()by calling the low-level op’sset_aie_stream(). - Update the stateful objectfifo lowering pass to avoid allocating DMA channels for stream-port ends.
Reviewed changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 2 comments.
| File | Description |
|---|---|
| python/iron/dataflow/objectfifo.py | Adds IRON API surface and forwards stream configuration to the underlying object_fifo op during resolution. |
| lib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp | Skips DMA channel allocation for objectfifo ends configured to use Core stream ports. |
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| stream_port: Core stream port index (default 0) | ||
| """ | ||
| if stream_end not in (0, 1, 2): | ||
| raise ValueError("stream_end must be 0 (producer), 1 (consumer), or 2 (both)") |
Comment on lines
+142
to
+143
| def set_aie_stream(self, stream_end: int, stream_port: int = 0): | ||
| """Configure one end of this ObjectFifo to use a Core stream port |
Collaborator
|
Hi @RobinMelhuish! Thank you for your contribution. We'll want to make sure the CI is in a good state before merging; also, we are actively trying to maintain/increase test coverage. If you could write corresponding tests for both the Python API change and the change to the ObjectFIFO stateful transform, that would be much appreciated! |
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Add set_aie_stream(stream_end, stream_port) method to the IRON-level ObjectFifo class, plumbing through to the existing low-level object_fifo.set_aie_stream() during resolve().
This allows IRON designs to use Core stream ports instead of DMA channels for ObjectFifo connections, enabling tiles with more than 2 input data flows (2 DMA + N stream ports).
The low-level dialect already supports aie_stream (PR #2693) but it was not exposed at the IRON Python API level.