β‘ Electrical Engineering Student | Computer Architecture Enthusiast | Open Source Contributor (500+ Contributions )
class Engineer {
public:
string name = "Muhammad Waleed Akram";
string university = "UET Lahore";
string major = "Electrical Engineering";
vector<string> interests = {
"Computer Architecture",
"Hardware Acceleration",
"Artificial Intelligence",
"Embedded Systems",
"Open Source Development"
};
vector<string> currentFocus = {
"SystemVerilog & Digital Design",
"Hardware / Software Co-design",
"EDA Tools",
"Open Source Contributions"
};
string mission =
"Explore the intersection of Computer Architecture, "
"Artificial Intelligence, and Electrical Systems "
"to build impactful technologies.";
}
- SystemVerilog / Verilog
- RISC-V Verification
- Spike Simulator
- C++ Testbenches
- Xilinx Vivado / Xilinx FPGA Toolchain
- ModelSim/QuestaSim
- Verilator
- GTKWave
- Makefiles
- Altium Designer
- NumPy
- Pandas
- Scikit-learn
- Matplotlib
- TensorFlow
- Keras
- Jupyter Notebooks
Studied mainly from Harvard's CS50 AI


