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Kimi K3.1 sparse attention previously gathered every rank's top-2048 candidate score/ID pairs onto every rank, then repeated the same ordered global selection. That replicated transport and selection work for each sparse-attention layer. Selecting query rows on assigned owners can reduce that work, but owner transport is slower for some shapes, so replacing the replicated implementation universally would regress them.

Add reusable prepared candidate selection, query-owner staging and byte-preserving selected-ID replication components. Both complete implementations use the same candidate preprocessing and ordered cutoff/tie rules. After child plans are prepared and complete trial forwards are compiled and warmed, a b12x composition race measures packing, transport, selection and replication together. Private trial inputs and independent holdout patterns verify exact selected IDs; their selected child plans must match the model bindings. The chosen implementation is bound before complete-model compilation and capture. Native replay performs no Python selection or runtime search.

The composition cache includes selected child programs/configurations and the compiled forward's executable identity. That identity covers generated kernels, launch configuration, storage signatures and opaque native/Triton invocations while excluding process-local table indices. Private trial graphs and storage are released before serving capture; model transport owners remain retained until the model closes. Owner-selected int32 IDs are replicated by encoding their bytes as exact BF16 integers, reducing disjoint owner contributions, then decoding; scores and ID bit patterns are not numerically approximated. Projection precision, checkpoint weights and native core contracts are unchanged.

The expected benefit is less replicated candidate traffic and selection work where the complete owner composition wins. In prior native qualification of this implementation together with its FlashInfer transport, Kimi K3.1 TP16 fixed C1/K7 GPU rounds averaged 29.229 versus 28.236 ms across three matched 1024-token requests. A paired all-rank profile reduced collective kernel-duration sums from 14.153 to 13.043 ms per rank per complete round; those sums include waits and overlap and are not elapsed round time. These are prior combined-stack results on sixteen RTX PRO 6000 Blackwell GPUs, with memory VF offset +6000, graphics offset 0, MXFP4/CSF experts, KDA-input-only target MXFP8 and BF16 draft/body/head. They are not measurements repeated on this port or an isolated benefit of its generic cache changes. Adaptive throughput improvement was inconclusive.

CPU validation of this port with PyTorch 2.14.1+cu132 passed 57 checks covering composition identity, compiled binding/cache ownership, candidate buffers and Kimi views; 22 CUDA checks were skipped with devices hidden. One unchanged scheduler negative-control test failed because it did not raise its expected InductorError. The same batch on the unchanged DFlash parent reproduced that failure, with 51 passes and the same 22 skips. No test or numerical bound was weakened. The ported TP16 compiled-selection fixture then passed 21 exact cases per rank with queued variants, and the production-registry fixture passed 32 exact cases per rank across capacities eight through one with selected calls replayed after private trial cleanup. The two pytest targets passed in 155.63 and 103.65 seconds respectively on sixteen RTX PRO 6000 Blackwell GPUs. Both alternatives were measured at every registry capacity with no rejection. These fresh races do not establish a restored composition-cache hit or a native throughput result.

This PR is stacked on Kimi DFlash2 PR #246 at 9a3245b3, which provides the model composition and bounded preparation storage. It additionally requires FlashInfer's TP16 candidate-owner exchange; the dependency pin combines that transport with the scale-storage and Torch-order RMSNorm support already used by its parent. The production race applies to compiled, autotuned, static-collective, single-request non-prefill capacities in a prepared speculative model. Prefill, multiple-request graphs, disabled autotuning and runtime-collective tuning retain replicated selection. No universal owner-path speedup, C4 throughput result or native qualification of the ported core is claimed.