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Support FP32 output and dynamic M in row-scaled FP4 grouped GEMM - #461

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Anerudhan merged 1 commit into
NVIDIA:developfrom
zianglih:row-scale-nvfp4-shape-support-issue-251
Aug 6, 2026
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Support FP32 output and dynamic M in row-scaled FP4 grouped GEMM#461
Anerudhan merged 1 commit into
NVIDIA:developfrom
zianglih:row-scale-nvfp4-shape-support-issue-251

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@zianglih

@zianglih zianglih commented Jul 31, 2026

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Summary

@HumansAnd

Extend the SM100 grouped GEMM quant path added in #251 so row-scaled NVFP4 integrations can use a unified cuDNN backend for the full shape and output-dtype matrix exercised by NVIDIA/TransformerEngine#3042.

Two frontend limitations blocked that integration:

  • The API rejected FP4 with 16-element scale vectors and FP32 output even though the underlying kernel already supports the FP32 epilogue.
  • The discrete-weight compile path specialized row_scale_tensor to the first runtime M. Its cache key intentionally treats M as dynamic, so reusing the cached kernel with another token count failed tensor-shape validation.

Logical K=64 is already supported by the Blackwell kernel. This change adds exact production-path coverage for K=64, N=256 rather than introducing padding or another backend.

Changes

  • Allow FP32 output for FP4 grouped GEMM with 16-element scale vectors.
  • Compile the discrete row-scale tensor with the same symbolic M used by A, D, and probability tensors.
  • Add exact discrete-pointer, dynamic-scheduler tests for K=64/N=256 with:
    • BF16 and FP32 output
    • bias and no bias
    • one empty expert
    • row-scaled E2M1 data with E4M3 scale factors
  • Add a cache regression that reuses one compiled kernel across M=1536 and M=3072.
  • Correct the test reference amax for an empty expert to match the kernel's -inf initialization.
  • Skip SM107 in the new row-scale tests because the Rubin grouped GEMM quant backend does not support row-scale fusion.
  • Remove the obsolete FP32 limitation from the grouped GEMM quant documentation.

Validation

  • python3 -m py_compile python/cudnn/gemm/cutedsl/grouped/quant/api.py test/python/fe_api/grouped_gemm/test_grouped_gemm_quant.py test/python/fe_api/grouped_gemm/test_grouped_gemm_quant_utils.py
  • pre-commit run --files python/cudnn/gemm/cutedsl/grouped/quant/api.py test/python/fe_api/grouped_gemm/test_grouped_gemm_quant.py test/python/fe_api/grouped_gemm/test_grouped_gemm_quant_utils.py docs/fe-oss-apis/gemm_fusions/grouped_gemm_quant.md -> passed
  • B200 --queue hell devbox using the exact editable cuDNN Frontend 1.27.0 checkout, CUTLASS DSL 4.6.0, CUDA 13.0, and cuDNN 9.22:
    • python3 -m pytest -q test/python/fe_api/grouped_gemm/test_grouped_gemm_quant.py -k 'discrete_wrapper_fp4_row_scale_small_k or discrete_wrapper_cache_dynamic_m_row_scale'
    • 5 passed, 315 deselected
  • Existing discrete row-scale regression coverage:
    • python3 -m pytest -q test/python/fe_api/grouped_gemm/test_grouped_gemm_quant.py::test_grouped_gemm_quant_discrete_compile_execute_fp4_row_scale test/python/fe_api/grouped_gemm/test_grouped_gemm_quant.py::test_grouped_gemm_quant_discrete_wrapper_fp4_row_scale
    • 2 passed
  • Prior TransformerEngine focused row-scaled NVFP4 integration coverage:
    • 14 passed
  • Prior TransformerEngine full PyTorch sanity suite:
    • 17266 passed, 33922 skipped, 4 warnings

Notes

  • No fallback GEMM backend is added; the integration remains entirely on the cuDNN path.
  • pre-commit run --all-files was also attempted. Current hooks rewrote pre-existing vendored, benchmark, and notebook files outside this change; those unrelated rewrites were restored. All hooks for the changed files pass.

Summary by CodeRabbit

  • New Features

    • Added support for FP4 grouped GEMM quantization with vector scale size 16 and float32 output.
    • Enabled discrete grouped GEMM configurations with dynamic dimensions, row scaling, optional bias, and dynamic scheduling.
  • Bug Fixes

    • Improved handling of empty groups during grouped GEMM reference calculations.
  • Tests

    • Expanded coverage for grouped GEMM quantization configurations and caching on supported hardware.

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Review Change Stack

📝 Walkthrough

Walkthrough

The change enables additional discrete grouped GEMM quantization configurations. It adds validation for weight layouts, conditional row-scale tensor creation, expanded cache and wrapper test coverage, fused bias cases, and empty-group reference handling.

Changes

Grouped GEMM quantization

Layer / File(s) Summary
FP4 and row-scale API support
python/cudnn/gemm/cutedsl/grouped/quant/api.py, docs/fe-oss-apis/gemm_fusions/grouped_gemm_quant.md
The API removes the FP4/FP32 rejection, validates discrete b_major, and creates fake row-scale tensors only when row scaling is configured. The documentation removes the unsupported-configuration constraint.
Discrete cache and wrapper coverage
test/python/fe_api/grouped_gemm/test_grouped_gemm_quant.py, test/python/fe_api/grouped_gemm/test_grouped_gemm_quant_utils.py
Tests cover configurable dtypes, scheduling, dimensions, group sizes, row scaling, fused bias, cache reuse, FP4 small-k cases, unsupported-case handling, and empty-group amax references.

Estimated code review effort: 3 (Moderate) | ~20 minutes

Suggested reviewers: anerudhan

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
Title check ✅ Passed The title clearly and concisely describes the primary changes to FP32 output and dynamic M support for row-scaled FP4 grouped GEMM.
Description check ✅ Passed The description covers the changes, rationale, compatibility intent, and detailed validation, but omits several template headings and checklist items.
✨ Finishing Touches
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  • Create PR with unit tests

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@zianglih
zianglih marked this pull request as ready for review July 31, 2026 04:27
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@zianglih zianglih changed the title Support FP32 row-scaled FP4 grouped GEMM Support FP32 output and dynamic M in row-scaled FP4 grouped GEMM Jul 31, 2026
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@Anerudhan
Anerudhan self-requested a review August 3, 2026 20:53
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Backend pipeline not launched

Reason: PR base branch 'main' does not match 'develop'

@Anerudhan Anerudhan added orig-nv-eng Reported or requested by NVIDIA engineering. mod-cutedsl CuTeDSL kernels, generated kernels, examples, or related integration work. cat-enhancements labels Aug 3, 2026
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Thanks @zianglih for the contribution.
I will update the PR with CI results and if any change is needed.

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Backend pipeline not launched

Reason: PR base branch 'main' does not match 'develop'

@zianglih
zianglih changed the base branch from main to develop August 5, 2026 21:20
@ziang-and
ziang-and force-pushed the row-scale-nvfp4-shape-support-issue-251 branch from 8313835 to aefe2c4 Compare August 5, 2026 21:20
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Note

GitHub couldn't provide a complete incremental comparison for this pull request, so CodeRabbit is performing a full review instead. This review may take a little longer.

Compile discrete row scaling with symbolic M so cached kernels can serve changing token counts. Cover the TransformerEngine K64/N256 path for BF16 and FP32 outputs with and without bias.

Signed-off-by: Ziang Li <ziangli@umich.edu>
@ziang-and
ziang-and force-pushed the row-scale-nvfp4-shape-support-issue-251 branch from aefe2c4 to 0444d32 Compare August 5, 2026 21:21
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Note

GitHub couldn't provide a complete incremental comparison for this pull request, so CodeRabbit is performing a full review instead. This review may take a little longer.

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@cudnn-ci-bot run oss

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🚀 Running mirror pipeline

Branch: cudnn-gh/pr-461-0444d32
Pipeline: 61316531
Targets: oss
Could not open: manual:oss (start them from the pipeline page)

@NVIDIA NVIDIA deleted a comment from cudnn-ci-bot Aug 6, 2026
@Anerudhan
Anerudhan merged commit ab9efe1 into NVIDIA:develop Aug 6, 2026
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