From cedfecf14c0dbb554f9f40a3f44736043270f686 Mon Sep 17 00:00:00 2001
From: kvp <223931578+kvpanch@users.noreply.github.com>
Date: Mon, 20 Apr 2026 22:35:07 -0400
Subject: [PATCH 1/2] Fuzz load + imm and load + imm + jump

---
 fuzz/fuzz_targets/fuzz_polkavm.rs | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/fuzz/fuzz_targets/fuzz_polkavm.rs b/fuzz/fuzz_targets/fuzz_polkavm.rs
index 8578f53d..487d4238 100644
--- a/fuzz/fuzz_targets/fuzz_polkavm.rs
+++ b/fuzz/fuzz_targets/fuzz_polkavm.rs
@@ -274,6 +274,14 @@ enum OperationKind {
         reg1: OperationReg,
         reg2: OperationReg,
     },
+    RegImm64Args {
+        reg: OperationReg,
+        imm: u64,
+    },
+    RegImmOffsetArgs {
+        reg: OperationReg,
+        imm: u32,
+    },
 }
 
 fn transform_code(data: Vec<OperationKind>) -> Vec<Instruction> {
@@ -504,6 +512,12 @@ fn transform_code(data: Vec<OperationKind>) -> Vec<Instruction> {
                     }
                 }
             }
+            OperationKind::RegImm64Args { reg, imm } => {
+                asm::load_imm64(reg.into(), imm)
+            }
+            OperationKind::RegImmOffsetArgs { reg, imm } => {
+                asm::load_imm_and_jump(reg.into(), imm, 0)
+            }
         };
 
         buffer.push(op);

From b95756f4facc479c15697cb6c1d045d1dc64eee1 Mon Sep 17 00:00:00 2001
From: kvp <223931578+kvpanch@users.noreply.github.com>
Date: Wed, 22 Apr 2026 09:45:30 -0400
Subject: [PATCH 2/2] code format

---
 fuzz/fuzz_targets/fuzz_polkavm.rs | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/fuzz/fuzz_targets/fuzz_polkavm.rs b/fuzz/fuzz_targets/fuzz_polkavm.rs
index 487d4238..87dc5e40 100644
--- a/fuzz/fuzz_targets/fuzz_polkavm.rs
+++ b/fuzz/fuzz_targets/fuzz_polkavm.rs
@@ -512,12 +512,8 @@ fn transform_code(data: Vec<OperationKind>) -> Vec<Instruction> {
                     }
                 }
             }
-            OperationKind::RegImm64Args { reg, imm } => {
-                asm::load_imm64(reg.into(), imm)
-            }
-            OperationKind::RegImmOffsetArgs { reg, imm } => {
-                asm::load_imm_and_jump(reg.into(), imm, 0)
-            }
+            OperationKind::RegImm64Args { reg, imm } => asm::load_imm64(reg.into(), imm),
+            OperationKind::RegImmOffsetArgs { reg, imm } => asm::load_imm_and_jump(reg.into(), imm, 0),
         };
 
         buffer.push(op);