diff --git a/src/hotspot/cpu/aarch64/aarch64.ad b/src/hotspot/cpu/aarch64/aarch64.ad
index 185d5b7201332..4fbbfc9d1dcaa 100644
--- a/src/hotspot/cpu/aarch64/aarch64.ad
+++ b/src/hotspot/cpu/aarch64/aarch64.ad
@@ -1986,7 +1986,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
 
   assert(src_lo != OptoReg::Bad && dst_lo != OptoReg::Bad, "must move at least 1 register");
 
-  if (src_hi != OptoReg::Bad && !bottom_type()->isa_vectmask()) {
+  if (src_hi != OptoReg::Bad && !bottom_type()->isa_pvectmask()) {
     assert((src_lo&1)==0 && src_lo+1==src_hi &&
            (dst_lo&1)==0 && dst_lo+1==dst_hi,
            "expected aligned-adjacent pairs");
@@ -2001,7 +2001,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
   int src_offset = ra_->reg2offset(src_lo);
   int dst_offset = ra_->reg2offset(dst_lo);
 
-  if (bottom_type()->isa_vect() && !bottom_type()->isa_vectmask()) {
+  if (bottom_type()->isa_vect() && !bottom_type()->isa_pvectmask()) {
     uint ireg = ideal_reg();
     DEBUG_ONLY(int algm = MIN2(RegMask::num_registers(ireg), (int)Matcher::stack_alignment_in_slots()) * VMRegImpl::stack_slot_size);
     assert((src_lo_rc != rc_stack) || is_aligned(src_offset, algm), "unaligned vector spill sp offset %d (src)", src_offset);
@@ -2149,7 +2149,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
     } else {
       st->print("%s", Matcher::regName[dst_lo]);
     }
-    if (bottom_type()->isa_vect() && !bottom_type()->isa_vectmask()) {
+    if (bottom_type()->isa_vect() && !bottom_type()->isa_pvectmask()) {
       int vsize = 0;
       switch (ideal_reg()) {
       case Op_VecD:
diff --git a/src/hotspot/cpu/aarch64/aarch64_vector.ad b/src/hotspot/cpu/aarch64/aarch64_vector.ad
index 396bcd4403867..2ff93c9e2886f 100644
--- a/src/hotspot/cpu/aarch64/aarch64_vector.ad
+++ b/src/hotspot/cpu/aarch64/aarch64_vector.ad
@@ -452,11 +452,11 @@ source %{
       // On architectures that do not support predicate, masks are stored in
       // general vector registers (TypeVect) with sizes ranging from TypeVectA
       // to TypeVectX based on the vector size in bytes.
-      assert(vt->isa_vectmask() == nullptr, "mask type is not matched");
+      assert(vt->isa_pvectmask() == nullptr, "mask type is not matched");
       return false;
     }
 
-    assert(vt->isa_vectmask() != nullptr, "expected TypeVectMask on SVE");
+    assert(vt->isa_pvectmask() != nullptr, "expected TypePVectMask on SVE");
     switch (opcode) {
       case Op_VectorMaskToLong:
       case Op_VectorLongToMask:
diff --git a/src/hotspot/cpu/aarch64/aarch64_vector_ad.m4 b/src/hotspot/cpu/aarch64/aarch64_vector_ad.m4
index 58c06a70e1e68..c5df949dfb6c1 100644
--- a/src/hotspot/cpu/aarch64/aarch64_vector_ad.m4
+++ b/src/hotspot/cpu/aarch64/aarch64_vector_ad.m4
@@ -442,11 +442,11 @@ source %{
       // On architectures that do not support predicate, masks are stored in
       // general vector registers (TypeVect) with sizes ranging from TypeVectA
       // to TypeVectX based on the vector size in bytes.
-      assert(vt->isa_vectmask() == nullptr, "mask type is not matched");
+      assert(vt->isa_pvectmask() == nullptr, "mask type is not matched");
       return false;
     }
 
-    assert(vt->isa_vectmask() != nullptr, "expected TypeVectMask on SVE");
+    assert(vt->isa_pvectmask() != nullptr, "expected TypePVectMask on SVE");
     switch (opcode) {
       case Op_VectorMaskToLong:
       case Op_VectorLongToMask:
diff --git a/src/hotspot/cpu/riscv/riscv.ad b/src/hotspot/cpu/riscv/riscv.ad
index e236d03e6d26d..e615b946b44ea 100644
--- a/src/hotspot/cpu/riscv/riscv.ad
+++ b/src/hotspot/cpu/riscv/riscv.ad
@@ -1580,7 +1580,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
 
   assert(src_lo != OptoReg::Bad && dst_lo != OptoReg::Bad, "must move at least 1 register");
 
-  if (src_hi != OptoReg::Bad && !bottom_type()->isa_vectmask()) {
+  if (src_hi != OptoReg::Bad && !bottom_type()->isa_pvectmask()) {
     assert((src_lo & 1) == 0 && src_lo + 1 == src_hi &&
            (dst_lo & 1) == 0 && dst_lo + 1 == dst_hi,
            "expected aligned-adjacent pairs");
@@ -1616,7 +1616,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
       } else {
         ShouldNotReachHere();
       }
-    } else if (bottom_type()->isa_vectmask() && masm) {
+    } else if (bottom_type()->isa_pvectmask() && masm) {
       int vmask_size_in_bytes = Matcher::scalable_predicate_reg_slots() * 32 / 8;
       if (src_lo_rc == rc_stack && dst_lo_rc == rc_stack) {
         // stack to stack
@@ -1718,7 +1718,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler *masm, PhaseRegAlloc *r
     } else {
       st->print("%s", Matcher::regName[dst_lo]);
     }
-    if (bottom_type()->isa_vect() && !bottom_type()->isa_vectmask()) {
+    if (bottom_type()->isa_vect() && !bottom_type()->isa_pvectmask()) {
       int vsize = 0;
       if (ideal_reg() == Op_VecA) {
         vsize = Matcher::scalable_vector_reg_size(T_BYTE) * 8;
diff --git a/src/hotspot/cpu/riscv/riscv_v.ad b/src/hotspot/cpu/riscv/riscv_v.ad
index aeb8398f06fcc..a0af43364cb0e 100644
--- a/src/hotspot/cpu/riscv/riscv_v.ad
+++ b/src/hotspot/cpu/riscv/riscv_v.ad
@@ -181,8 +181,8 @@ source %{
   }
 
   bool Matcher::mask_op_prefers_predicate(int opcode, const TypeVect* vt) {
-    // Prefer predicate if the mask type is "TypeVectMask".
-    return vt->isa_vectmask() != nullptr;
+    // Prefer predicate if the mask type is "TypePVectMask".
+    return vt->isa_pvectmask() != nullptr;
   }
 %}
 
diff --git a/src/hotspot/cpu/x86/x86.ad b/src/hotspot/cpu/x86/x86.ad
index a029d33cdec33..f99d1ea9d48d9 100644
--- a/src/hotspot/cpu/x86/x86.ad
+++ b/src/hotspot/cpu/x86/x86.ad
@@ -2159,7 +2159,7 @@ uint MachSpillCopyNode::implementation(C2_MacroAssembler* masm,
     // Self copy, no move
     return 0;
   }
-  if (bottom_type()->isa_vect() != nullptr && bottom_type()->isa_vectmask() == nullptr) {
+  if (bottom_type()->isa_vect() != nullptr && bottom_type()->isa_pvectmask() == nullptr) {
     uint ireg = ideal_reg();
     assert((src_first_rc != rc_int && dst_first_rc != rc_int), "sanity");
     assert((ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ ), "sanity");
@@ -3789,8 +3789,8 @@ bool Matcher::vector_rearrange_requires_load_shuffle(BasicType elem_bt, int vlen
 }
 
 bool Matcher::mask_op_prefers_predicate(int opcode, const TypeVect* vt) {
-  // Prefer predicate if the mask type is "TypeVectMask".
-  return vt->isa_vectmask() != nullptr;
+  // Prefer predicate if the mask type is "TypePVectMask".
+  return vt->isa_pvectmask() != nullptr;
 }
 
 MachOper* Matcher::pd_specialize_generic_vector_operand(MachOper* generic_opnd, uint ideal_reg, bool is_temp) {
@@ -18215,7 +18215,7 @@ instruct vconvHF2F(vec dst, vec src) %{
 
 // ---------------------------------------- VectorReinterpret ------------------------------------
 instruct reinterpret_mask(kReg dst) %{
-  predicate(n->bottom_type()->isa_vectmask() &&
+  predicate(n->bottom_type()->isa_pvectmask() &&
             Matcher::vector_length(n) == Matcher::vector_length(n->in(1))); // dst == src
   match(Set dst (VectorReinterpret dst));
   ins_cost(125);
@@ -18228,10 +18228,10 @@ instruct reinterpret_mask(kReg dst) %{
 
 instruct reinterpret_mask_W2B(kReg dst, kReg src, vec xtmp) %{
   predicate(UseAVX > 2 && Matcher::vector_length(n) != Matcher::vector_length(n->in(1)) &&
-            n->bottom_type()->isa_vectmask() &&
-            n->in(1)->bottom_type()->isa_vectmask() &&
-            n->in(1)->bottom_type()->is_vectmask()->element_basic_type() == T_SHORT &&
-            n->bottom_type()->is_vectmask()->element_basic_type() == T_BYTE); // dst == src
+            n->bottom_type()->isa_pvectmask() &&
+            n->in(1)->bottom_type()->isa_pvectmask() &&
+            n->in(1)->bottom_type()->is_pvectmask()->element_basic_type() == T_SHORT &&
+            n->bottom_type()->is_pvectmask()->element_basic_type() == T_BYTE); // dst == src
   match(Set dst (VectorReinterpret src));
   effect(TEMP xtmp);
   format %{ "vector_mask_reinterpret_W2B $dst $src\t!" %}
@@ -18248,11 +18248,11 @@ instruct reinterpret_mask_W2B(kReg dst, kReg src, vec xtmp) %{
 
 instruct reinterpret_mask_D2B(kReg dst, kReg src, vec xtmp) %{
   predicate(UseAVX > 2 && Matcher::vector_length(n) != Matcher::vector_length(n->in(1)) &&
-            n->bottom_type()->isa_vectmask() &&
-            n->in(1)->bottom_type()->isa_vectmask() &&
-            (n->in(1)->bottom_type()->is_vectmask()->element_basic_type() == T_INT ||
-             n->in(1)->bottom_type()->is_vectmask()->element_basic_type() == T_FLOAT) &&
-            n->bottom_type()->is_vectmask()->element_basic_type() == T_BYTE); // dst == src
+            n->bottom_type()->isa_pvectmask() &&
+            n->in(1)->bottom_type()->isa_pvectmask() &&
+            (n->in(1)->bottom_type()->is_pvectmask()->element_basic_type() == T_INT ||
+             n->in(1)->bottom_type()->is_pvectmask()->element_basic_type() == T_FLOAT) &&
+            n->bottom_type()->is_pvectmask()->element_basic_type() == T_BYTE); // dst == src
   match(Set dst (VectorReinterpret src));
   effect(TEMP xtmp);
   format %{ "vector_mask_reinterpret_D2B $dst $src\t!" %}
@@ -18269,11 +18269,11 @@ instruct reinterpret_mask_D2B(kReg dst, kReg src, vec xtmp) %{
 
 instruct reinterpret_mask_Q2B(kReg dst, kReg src, vec xtmp) %{
   predicate(UseAVX > 2 && Matcher::vector_length(n) != Matcher::vector_length(n->in(1)) &&
-            n->bottom_type()->isa_vectmask() &&
-            n->in(1)->bottom_type()->isa_vectmask() &&
-            (n->in(1)->bottom_type()->is_vectmask()->element_basic_type() == T_LONG ||
-             n->in(1)->bottom_type()->is_vectmask()->element_basic_type() == T_DOUBLE) &&
-            n->bottom_type()->is_vectmask()->element_basic_type() == T_BYTE); // dst == src
+            n->bottom_type()->isa_pvectmask() &&
+            n->in(1)->bottom_type()->isa_pvectmask() &&
+            (n->in(1)->bottom_type()->is_pvectmask()->element_basic_type() == T_LONG ||
+             n->in(1)->bottom_type()->is_pvectmask()->element_basic_type() == T_DOUBLE) &&
+            n->bottom_type()->is_pvectmask()->element_basic_type() == T_BYTE); // dst == src
   match(Set dst (VectorReinterpret src));
   effect(TEMP xtmp);
   format %{ "vector_mask_reinterpret_Q2B $dst $src\t!" %}
@@ -18289,7 +18289,7 @@ instruct reinterpret_mask_Q2B(kReg dst, kReg src, vec xtmp) %{
 %}
 
 instruct reinterpret(vec dst) %{
-  predicate(!n->bottom_type()->isa_vectmask() &&
+  predicate(!n->bottom_type()->isa_pvectmask() &&
             Matcher::vector_length_in_bytes(n) == Matcher::vector_length_in_bytes(n->in(1))); // dst == src
   match(Set dst (VectorReinterpret dst));
   ins_cost(125);
@@ -18325,7 +18325,7 @@ instruct reinterpret_expand(vec dst, vec src) %{
 
 instruct vreinterpret_expand4(legVec dst, vec src) %{
   predicate(UseAVX > 0 &&
-            !n->bottom_type()->isa_vectmask() &&
+            !n->bottom_type()->isa_pvectmask() &&
             (Matcher::vector_length_in_bytes(n->in(1)) == 4) && // src
             (Matcher::vector_length_in_bytes(n->in(1)) < Matcher::vector_length_in_bytes(n))); // src < dst
   match(Set dst (VectorReinterpret src));
@@ -18340,7 +18340,7 @@ instruct vreinterpret_expand4(legVec dst, vec src) %{
 
 instruct vreinterpret_expand(legVec dst, vec src) %{
   predicate(UseAVX > 0 &&
-            !n->bottom_type()->isa_vectmask() &&
+            !n->bottom_type()->isa_pvectmask() &&
             (Matcher::vector_length_in_bytes(n->in(1)) > 4) && // src
             (Matcher::vector_length_in_bytes(n->in(1)) < Matcher::vector_length_in_bytes(n))); // src < dst
   match(Set dst (VectorReinterpret src));
@@ -18358,7 +18358,7 @@ instruct vreinterpret_expand(legVec dst, vec src) %{
 %}
 
 instruct reinterpret_shrink(vec dst, legVec src) %{
-  predicate(!n->bottom_type()->isa_vectmask() &&
+  predicate(!n->bottom_type()->isa_pvectmask() &&
             Matcher::vector_length_in_bytes(n->in(1)) > Matcher::vector_length_in_bytes(n)); // src > dst
   match(Set dst (VectorReinterpret src));
   ins_cost(125);
@@ -22466,7 +22466,7 @@ instruct vround_reg_evex(vec dst, vec src, rRegP tmp, vec xtmp1, vec xtmp2, kReg
 // --------------------------------- VectorMaskCmp --------------------------------------
 
 instruct vcmpFD(legVec dst, legVec src1, legVec src2, immI8 cond) %{
-  predicate(n->bottom_type()->isa_vectmask() == nullptr &&
+  predicate(n->bottom_type()->isa_pvectmask() == nullptr &&
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) >=  8 && // src1
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) <= 32 && // src1
             is_floating_point_type(Matcher::vector_element_basic_type(n->in(1)->in(1)))); // src1 T_FLOAT, T_DOUBLE
@@ -22486,7 +22486,7 @@ instruct vcmpFD(legVec dst, legVec src1, legVec src2, immI8 cond) %{
 
 instruct evcmpFD64(vec dst, vec src1, vec src2, immI8 cond, kReg ktmp) %{
   predicate(Matcher::vector_length_in_bytes(n->in(1)->in(1)) == 64 && // src1
-            n->bottom_type()->isa_vectmask() == nullptr &&
+            n->bottom_type()->isa_pvectmask() == nullptr &&
             is_floating_point_type(Matcher::vector_element_basic_type(n->in(1)->in(1)))); // src1 T_FLOAT, T_DOUBLE
   match(Set dst (VectorMaskCmp (Binary src1 src2) cond));
   effect(TEMP ktmp);
@@ -22507,12 +22507,12 @@ instruct evcmpFD64(vec dst, vec src1, vec src2, immI8 cond, kReg ktmp) %{
 %}
 
 instruct evcmpFD(kReg dst, vec src1, vec src2, immI8 cond) %{
-  predicate(n->bottom_type()->isa_vectmask() &&
+  predicate(n->bottom_type()->isa_pvectmask() &&
             is_floating_point_type(Matcher::vector_element_basic_type(n->in(1)->in(1)))); // src1 T_FLOAT, T_DOUBLE
   match(Set dst (VectorMaskCmp (Binary src1 src2) cond));
   format %{ "vector_compare_evex $dst,$src1,$src2,$cond\t!" %}
   ins_encode %{
-    assert(bottom_type()->isa_vectmask(), "TypeVectMask expected");
+    assert(bottom_type()->isa_pvectmask(), "TypePVectMask expected");
     int vlen_enc = vector_length_encoding(this, $src1);
     Assembler::ComparisonPredicateFP cmp = booltest_pred_to_comparison_pred_fp($cond$$constant);
     KRegister mask = k0; // The comparison itself is not being masked.
@@ -22526,7 +22526,7 @@ instruct evcmpFD(kReg dst, vec src1, vec src2, immI8 cond) %{
 %}
 
 instruct vcmp_direct(legVec dst, legVec src1, legVec src2, immI8 cond) %{
-  predicate(n->bottom_type()->isa_vectmask() == nullptr &&
+  predicate(n->bottom_type()->isa_pvectmask() == nullptr &&
             !Matcher::is_unsigned_booltest_pred(n->in(2)->get_int()) &&
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) >=  4 && // src1
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) <= 32 && // src1
@@ -22546,7 +22546,7 @@ instruct vcmp_direct(legVec dst, legVec src1, legVec src2, immI8 cond) %{
 %}
 
 instruct vcmp_negate(legVec dst, legVec src1, legVec src2, immI8 cond, legVec xtmp) %{
-  predicate(n->bottom_type()->isa_vectmask() == nullptr &&
+  predicate(n->bottom_type()->isa_pvectmask() == nullptr &&
             !Matcher::is_unsigned_booltest_pred(n->in(2)->get_int()) &&
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) >=  4 && // src1
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) <= 32 && // src1
@@ -22567,7 +22567,7 @@ instruct vcmp_negate(legVec dst, legVec src1, legVec src2, immI8 cond, legVec xt
 %}
 
 instruct vcmpu(legVec dst, legVec src1, legVec src2, immI8 cond, legVec xtmp) %{
-  predicate(n->bottom_type()->isa_vectmask() == nullptr &&
+  predicate(n->bottom_type()->isa_pvectmask() == nullptr &&
             Matcher::is_unsigned_booltest_pred(n->in(2)->get_int()) &&
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) >=  4 && // src1
             Matcher::vector_length_in_bytes(n->in(1)->in(1)) <= 32 && // src1
@@ -22594,7 +22594,7 @@ instruct vcmpu(legVec dst, legVec src1, legVec src2, immI8 cond, legVec xtmp) %{
 %}
 
 instruct vcmp64(vec dst, vec src1, vec src2, immI8 cond, kReg ktmp) %{
-  predicate((n->bottom_type()->isa_vectmask() == nullptr &&
+  predicate((n->bottom_type()->isa_pvectmask() == nullptr &&
              Matcher::vector_length_in_bytes(n->in(1)->in(1)) == 64) && // src1
              is_integral_type(Matcher::vector_element_basic_type(n->in(1)->in(1)))); // src1
   match(Set dst (VectorMaskCmp (Binary src1 src2) cond));
@@ -22629,13 +22629,13 @@ instruct vcmp64(vec dst, vec src1, vec src2, immI8 cond, kReg ktmp) %{
 
 
 instruct evcmp(kReg dst, vec src1, vec src2, immI8 cond) %{
-  predicate(n->bottom_type()->isa_vectmask() &&
+  predicate(n->bottom_type()->isa_pvectmask() &&
             is_integral_type(Matcher::vector_element_basic_type(n->in(1)->in(1)))); // src1
   match(Set dst (VectorMaskCmp (Binary src1 src2) cond));
   format %{ "vector_compared_evex $dst,$src1,$src2,$cond\t!" %}
   ins_encode %{
     assert(UseAVX > 2, "required");
-    assert(bottom_type()->isa_vectmask(), "TypeVectMask expected");
+    assert(bottom_type()->isa_pvectmask(), "TypePVectMask expected");
 
     int vlen_enc = vector_length_encoding(this, $src1);
     Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred($cond$$constant);
@@ -22804,7 +22804,7 @@ instruct blendvp(vec dst, vec src, vec mask, rxmm0 tmp) %{
 
 instruct vblendvpI(legVec dst, legVec src1, legVec src2, legVec mask) %{
   predicate(UseAVX > 0 && !EnableX86ECoreOpts &&
-            n->in(2)->bottom_type()->isa_vectmask() == nullptr &&
+            n->in(2)->bottom_type()->isa_pvectmask() == nullptr &&
             Matcher::vector_length_in_bytes(n) <= 32 &&
             is_integral_type(Matcher::vector_element_basic_type(n)));
   match(Set dst (VectorBlend (Binary src1 src2) mask));
@@ -22818,7 +22818,7 @@ instruct vblendvpI(legVec dst, legVec src1, legVec src2, legVec mask) %{
 
 instruct vblendvpFD(legVec dst, legVec src1, legVec src2, legVec mask) %{
   predicate(UseAVX > 0 && !EnableX86ECoreOpts &&
-            n->in(2)->bottom_type()->isa_vectmask() == nullptr &&
+            n->in(2)->bottom_type()->isa_pvectmask() == nullptr &&
             Matcher::vector_length_in_bytes(n) <= 32 &&
             !is_integral_type(Matcher::vector_element_basic_type(n)));
   match(Set dst (VectorBlend (Binary src1 src2) mask));
@@ -22832,7 +22832,7 @@ instruct vblendvpFD(legVec dst, legVec src1, legVec src2, legVec mask) %{
 
 instruct vblendvp(legVec dst, legVec src1, legVec src2, legVec mask, legVec vtmp) %{
   predicate(UseAVX > 0 && EnableX86ECoreOpts &&
-            n->in(2)->bottom_type()->isa_vectmask() == nullptr &&
+            n->in(2)->bottom_type()->isa_pvectmask() == nullptr &&
             Matcher::vector_length_in_bytes(n) <= 32);
   match(Set dst (VectorBlend (Binary src1 src2) mask));
   format %{ "vector_blend  $dst,$src1,$src2,$mask\t! using $vtmp as TEMP" %}
@@ -22848,7 +22848,7 @@ instruct vblendvp(legVec dst, legVec src1, legVec src2, legVec mask, legVec vtmp
 
 instruct evblendvp64(vec dst, vec src1, vec src2, vec mask, kReg ktmp) %{
   predicate(Matcher::vector_length_in_bytes(n) == 64 &&
-            n->in(2)->bottom_type()->isa_vectmask() == nullptr);
+            n->in(2)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorBlend (Binary src1 src2) mask));
   format %{ "vector_blend  $dst,$src1,$src2,$mask\t! using k2 as TEMP" %}
   effect(TEMP ktmp);
@@ -22863,7 +22863,7 @@ instruct evblendvp64(vec dst, vec src1, vec src2, vec mask, kReg ktmp) %{
 
 
 instruct evblendvp64_masked(vec dst, vec src1, vec src2, kReg mask) %{
-  predicate(n->in(2)->bottom_type()->isa_vectmask() &&
+  predicate(n->in(2)->bottom_type()->isa_pvectmask() &&
             (!is_subword_type(Matcher::vector_element_basic_type(n)) ||
              VM_Version::supports_avx512bw()));
   match(Set dst (VectorBlend (Binary src1 src2) mask));
@@ -23062,7 +23062,7 @@ instruct ktest_ge8(rFlagsRegU cr, kReg src1, kReg src2) %{
 //------------------------------------- LoadMask --------------------------------------------
 
 instruct loadMask(legVec dst, legVec src) %{
-  predicate(n->bottom_type()->isa_vectmask() == nullptr && !VM_Version::supports_avx512vlbw());
+  predicate(n->bottom_type()->isa_pvectmask() == nullptr && !VM_Version::supports_avx512vlbw());
   match(Set dst (VectorLoadMask src));
   effect(TEMP dst);
   format %{ "vector_loadmask_byte $dst, $src\n\t" %}
@@ -23075,7 +23075,7 @@ instruct loadMask(legVec dst, legVec src) %{
 %}
 
 instruct loadMask64(kReg dst, vec src, vec xtmp) %{
-  predicate(n->bottom_type()->isa_vectmask() && !VM_Version::supports_avx512vlbw());
+  predicate(n->bottom_type()->isa_pvectmask() && !VM_Version::supports_avx512vlbw());
   match(Set dst (VectorLoadMask src));
   effect(TEMP xtmp);
   format %{ "vector_loadmask_64byte $dst, $src\t! using $xtmp as TEMP" %}
@@ -23087,7 +23087,7 @@ instruct loadMask64(kReg dst, vec src, vec xtmp) %{
 %}
 
 instruct loadMask_evex(kReg dst, vec src,  vec xtmp) %{
-  predicate(n->bottom_type()->isa_vectmask() && VM_Version::supports_avx512vlbw());
+  predicate(n->bottom_type()->isa_pvectmask() && VM_Version::supports_avx512vlbw());
   match(Set dst (VectorLoadMask src));
   effect(TEMP xtmp);
   format %{ "vector_loadmask_byte $dst, $src\t! using $xtmp as TEMP" %}
@@ -23102,7 +23102,7 @@ instruct loadMask_evex(kReg dst, vec src,  vec xtmp) %{
 //------------------------------------- StoreMask --------------------------------------------
 
 instruct vstoreMask1B(vec dst, vec src, immI_1 size) %{
-  predicate(Matcher::vector_length(n) < 64 && n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(Matcher::vector_length(n) < 64 && n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorStoreMask src size));
   format %{ "vector_store_mask $dst, $src \t! elem size is $size byte[s]" %}
   ins_encode %{
@@ -23120,7 +23120,7 @@ instruct vstoreMask1B(vec dst, vec src, immI_1 size) %{
 %}
 
 instruct vstoreMask2B(vec dst, vec src, vec xtmp, immI_2 size) %{
-  predicate(Matcher::vector_length(n) <= 16 && n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(Matcher::vector_length(n) <= 16 && n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorStoreMask src size));
   effect(TEMP_DEF dst, TEMP xtmp);
   format %{ "vector_store_mask $dst, $src \t! elem size is $size byte[s]" %}
@@ -23143,7 +23143,7 @@ instruct vstoreMask2B(vec dst, vec src, vec xtmp, immI_2 size) %{
 %}
 
 instruct vstoreMask4B(vec dst, vec src, vec xtmp, immI_4 size) %{
-  predicate(UseAVX <= 2 && Matcher::vector_length(n) <= 8 && n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(UseAVX <= 2 && Matcher::vector_length(n) <= 8 && n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorStoreMask src size));
   format %{ "vector_store_mask $dst, $src \t! elem size is $size byte[s]" %}
   effect(TEMP_DEF dst, TEMP xtmp);
@@ -23203,7 +23203,7 @@ instruct storeMask8B_avx(vec dst, vec src, immI_8 size, vec vtmp) %{
 %}
 
 instruct vstoreMask4B_evex_novectmask(vec dst, vec src, immI_4 size) %{
-  predicate(UseAVX > 2 && n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(UseAVX > 2 && n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorStoreMask src size));
   format %{ "vector_store_mask $dst, $src \t! elem size is $size byte[s]" %}
   ins_encode %{
@@ -23219,7 +23219,7 @@ instruct vstoreMask4B_evex_novectmask(vec dst, vec src, immI_4 size) %{
 %}
 
 instruct vstoreMask8B_evex_novectmask(vec dst, vec src, immI_8 size) %{
-  predicate(UseAVX > 2 && n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(UseAVX > 2 && n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorStoreMask src size));
   format %{ "vector_store_mask $dst, $src \t! elem size is $size byte[s]" %}
   ins_encode %{
@@ -23235,7 +23235,7 @@ instruct vstoreMask8B_evex_novectmask(vec dst, vec src, immI_8 size) %{
 %}
 
 instruct vstoreMask_evex_vectmask(vec dst, kReg mask, immI size) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask() && !VM_Version::supports_avx512vlbw());
+  predicate(n->in(1)->bottom_type()->isa_pvectmask() && !VM_Version::supports_avx512vlbw());
   match(Set dst (VectorStoreMask mask size));
   effect(TEMP_DEF dst);
   format %{ "vector_store_mask $dst, $mask \t! elem size is $size byte[s]" %}
@@ -23249,7 +23249,7 @@ instruct vstoreMask_evex_vectmask(vec dst, kReg mask, immI size) %{
 %}
 
 instruct vstoreMask_evex(vec dst, kReg mask, immI size) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask() && VM_Version::supports_avx512vlbw());
+  predicate(n->in(1)->bottom_type()->isa_pvectmask() && VM_Version::supports_avx512vlbw());
   match(Set dst (VectorStoreMask mask size));
   effect(TEMP_DEF dst);
   format %{ "vector_store_mask $dst, $mask \t! elem size is $size byte[s]" %}
@@ -23870,7 +23870,7 @@ instruct vprorate(vec dst, vec src, vec shift) %{
 
 // ---------------------------------- Masked Operations ------------------------------------
 instruct vmasked_load_avx_non_subword(vec dst, memory mem, vec mask) %{
-  predicate(!n->in(3)->bottom_type()->isa_vectmask());
+  predicate(!n->in(3)->bottom_type()->isa_pvectmask());
   match(Set dst (LoadVectorMasked mem mask));
   format %{ "vector_masked_load $dst, $mem, $mask \t! vector masked copy" %}
   ins_encode %{
@@ -23883,7 +23883,7 @@ instruct vmasked_load_avx_non_subword(vec dst, memory mem, vec mask) %{
 
 
 instruct vmasked_load_evex(vec dst, memory mem, kReg mask) %{
-  predicate(n->in(3)->bottom_type()->isa_vectmask());
+  predicate(n->in(3)->bottom_type()->isa_pvectmask());
   match(Set dst (LoadVectorMasked mem mask));
   format %{ "vector_masked_load $dst, $mem, $mask \t! vector masked copy" %}
   ins_encode %{
@@ -23895,7 +23895,7 @@ instruct vmasked_load_evex(vec dst, memory mem, kReg mask) %{
 %}
 
 instruct vmasked_store_avx_non_subword(memory mem, vec src, vec mask) %{
-  predicate(!n->in(3)->in(2)->bottom_type()->isa_vectmask());
+  predicate(!n->in(3)->in(2)->bottom_type()->isa_pvectmask());
   match(Set mem (StoreVectorMasked mem (Binary src mask)));
   format %{ "vector_masked_store $mem, $src, $mask \t! vector masked store" %}
   ins_encode %{
@@ -23908,7 +23908,7 @@ instruct vmasked_store_avx_non_subword(memory mem, vec src, vec mask) %{
 %}
 
 instruct vmasked_store_evex(memory mem, vec src, kReg mask) %{
-  predicate(n->in(3)->in(2)->bottom_type()->isa_vectmask());
+  predicate(n->in(3)->in(2)->bottom_type()->isa_pvectmask());
   match(Set mem (StoreVectorMasked mem (Binary src mask)));
   format %{ "vector_masked_store $mem, $src, $mask \t! vector masked store" %}
   ins_encode %{
@@ -23987,7 +23987,7 @@ instruct vmask_gen_imm(kReg dst, immL len, rRegL temp) %{
 %}
 
 instruct vmask_tolong_evex(rRegL dst, kReg mask, rFlagsReg cr) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask());
+  predicate(n->in(1)->bottom_type()->isa_pvectmask());
   match(Set dst (VectorMaskToLong mask));
   effect(TEMP dst, KILL cr);
   format %{ "vector_tolong_evex $dst, $mask \t! vector mask tolong" %}
@@ -24004,7 +24004,7 @@ instruct vmask_tolong_evex(rRegL dst, kReg mask, rFlagsReg cr) %{
 %}
 
 instruct vmask_tolong_bool(rRegL dst, vec mask, vec xtmp, rFlagsReg cr) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorMaskToLong mask));
   format %{ "vector_tolong_bool $dst, $mask \t! using $xtmp as TEMP" %}
   effect(TEMP_DEF dst, TEMP xtmp, KILL cr);
@@ -24020,7 +24020,7 @@ instruct vmask_tolong_bool(rRegL dst, vec mask, vec xtmp, rFlagsReg cr) %{
 %}
 
 instruct vmask_tolong_avx(rRegL dst, vec mask, immI size, vec xtmp, rFlagsReg cr) %{
-  predicate(n->in(1)->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(n->in(1)->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorMaskToLong (VectorStoreMask mask size)));
   format %{ "vector_tolong_avx $dst, $mask \t! using $xtmp as TEMP" %}
   effect(TEMP_DEF dst, TEMP xtmp, KILL cr);
@@ -24036,7 +24036,7 @@ instruct vmask_tolong_avx(rRegL dst, vec mask, immI size, vec xtmp, rFlagsReg cr
 %}
 
 instruct vmask_truecount_evex(rRegI dst, kReg mask, rRegL tmp, rFlagsReg cr) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask());
+  predicate(n->in(1)->bottom_type()->isa_pvectmask());
   match(Set dst (VectorMaskTrueCount mask));
   effect(TEMP_DEF dst, TEMP tmp, KILL cr);
   format %{ "vector_truecount_evex $dst, $mask \t! using $tmp as TEMP" %}
@@ -24053,7 +24053,7 @@ instruct vmask_truecount_evex(rRegI dst, kReg mask, rRegL tmp, rFlagsReg cr) %{
 %}
 
 instruct vmask_truecount_bool(rRegI dst, vec mask, rRegL tmp, vec xtmp, rFlagsReg cr) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorMaskTrueCount mask));
   effect(TEMP_DEF dst, TEMP tmp, TEMP xtmp, KILL cr);
   format %{ "vector_truecount_bool $dst, $mask \t! using $tmp, $xtmp as TEMP" %}
@@ -24069,7 +24069,7 @@ instruct vmask_truecount_bool(rRegI dst, vec mask, rRegL tmp, vec xtmp, rFlagsRe
 %}
 
 instruct vmask_truecount_avx(rRegI dst, vec mask, immI size, rRegL tmp, vec xtmp, rFlagsReg cr) %{
-  predicate(n->in(1)->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(n->in(1)->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorMaskTrueCount (VectorStoreMask mask size)));
   effect(TEMP_DEF dst, TEMP tmp, TEMP xtmp, KILL cr);
   format %{ "vector_truecount_avx $dst, $mask \t! using $tmp, $xtmp as TEMP" %}
@@ -24085,7 +24085,7 @@ instruct vmask_truecount_avx(rRegI dst, vec mask, immI size, rRegL tmp, vec xtmp
 %}
 
 instruct vmask_first_or_last_true_evex(rRegI dst, kReg mask, rRegL tmp, rFlagsReg cr) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask());
+  predicate(n->in(1)->bottom_type()->isa_pvectmask());
   match(Set dst (VectorMaskFirstTrue mask));
   match(Set dst (VectorMaskLastTrue mask));
   effect(TEMP_DEF dst, TEMP tmp, KILL cr);
@@ -24103,7 +24103,7 @@ instruct vmask_first_or_last_true_evex(rRegI dst, kReg mask, rRegL tmp, rFlagsRe
 %}
 
 instruct vmask_first_or_last_true_bool(rRegI dst, vec mask, rRegL tmp, vec xtmp, rFlagsReg cr) %{
-  predicate(n->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(n->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorMaskFirstTrue mask));
   match(Set dst (VectorMaskLastTrue mask));
   effect(TEMP_DEF dst, TEMP tmp, TEMP xtmp, KILL cr);
@@ -24120,7 +24120,7 @@ instruct vmask_first_or_last_true_bool(rRegI dst, vec mask, rRegL tmp, vec xtmp,
 %}
 
 instruct vmask_first_or_last_true_avx(rRegI dst, vec mask, immI size, rRegL tmp, vec xtmp, rFlagsReg cr) %{
-  predicate(n->in(1)->in(1)->bottom_type()->isa_vectmask() == nullptr);
+  predicate(n->in(1)->in(1)->bottom_type()->isa_pvectmask() == nullptr);
   match(Set dst (VectorMaskFirstTrue (VectorStoreMask mask size)));
   match(Set dst (VectorMaskLastTrue (VectorStoreMask mask size)));
   effect(TEMP_DEF dst, TEMP tmp, TEMP xtmp, KILL cr);
@@ -24172,7 +24172,7 @@ instruct vcompress_mask_reg_evex(kReg dst, kReg mask, rRegL rtmp1, rRegL rtmp2,
   effect(TEMP rtmp1, TEMP rtmp2, KILL cr);
   format %{ "mask_compress_evex $dst, $mask\t! using $rtmp1 and $rtmp2 as TEMP" %}
   ins_encode %{
-    assert(this->in(1)->bottom_type()->isa_vectmask(), "");
+    assert(this->in(1)->bottom_type()->isa_pvectmask(), "");
     int mask_len = Matcher::vector_length(this);
     __ vector_mask_compress($dst$$KRegister, $mask$$KRegister, $rtmp1$$Register, $rtmp2$$Register, mask_len);
   %}
@@ -24842,7 +24842,7 @@ instruct evcmp_masked(kReg dst, vec src1, vec src2, immI8 cond, kReg mask) %{
   match(Set dst (VectorMaskCmp (Binary src1 src2) (Binary cond mask)));
   format %{ "vcmp_masked $dst, $src1, $src2, $cond, $mask" %}
   ins_encode %{
-    assert(bottom_type()->isa_vectmask(), "TypeVectMask expected");
+    assert(bottom_type()->isa_pvectmask(), "TypePVectMask expected");
     int vlen_enc = vector_length_encoding(this, $src1);
     BasicType src1_elem_bt = Matcher::vector_element_basic_type(this, $src1);
 
@@ -24925,7 +24925,7 @@ instruct mask_not_imm(kReg dst, kReg src, immI_M1 cnt) %{
 %}
 
 instruct long_to_maskLE8_avx(vec dst, rRegL src, rRegL rtmp1, rRegL rtmp2) %{
-  predicate(n->bottom_type()->isa_vectmask() == nullptr && Matcher::vector_length(n) <= 8);
+  predicate(n->bottom_type()->isa_pvectmask() == nullptr && Matcher::vector_length(n) <= 8);
   match(Set dst (VectorLongToMask src));
   effect(TEMP dst, TEMP rtmp1, TEMP rtmp2);
   format %{ "long_to_mask_avx $dst, $src\t! using $rtmp1, $rtmp2" %}
@@ -24940,7 +24940,7 @@ instruct long_to_maskLE8_avx(vec dst, rRegL src, rRegL rtmp1, rRegL rtmp2) %{
 
 
 instruct long_to_maskGT8_avx(vec dst, rRegL src, rRegL rtmp1, rRegL rtmp2, vec xtmp1, rFlagsReg cr) %{
-  predicate(n->bottom_type()->isa_vectmask() == nullptr && Matcher::vector_length(n) > 8);
+  predicate(n->bottom_type()->isa_pvectmask() == nullptr && Matcher::vector_length(n) > 8);
   match(Set dst (VectorLongToMask src));
   effect(TEMP dst, TEMP rtmp1, TEMP rtmp2, TEMP xtmp1, KILL cr);
   format %{ "long_to_mask_avx $dst, $src\t! using $rtmp1, $rtmp2, $xtmp1, as TEMP" %}
@@ -24955,7 +24955,7 @@ instruct long_to_maskGT8_avx(vec dst, rRegL src, rRegL rtmp1, rRegL rtmp2, vec x
 %}
 
 instruct long_to_mask_evex(kReg dst, rRegL src) %{
-  predicate(n->bottom_type()->isa_vectmask());
+  predicate(n->bottom_type()->isa_pvectmask());
   match(Set dst (VectorLongToMask src));
   format %{ "long_to_mask_evex $dst, $src\t!" %}
   ins_encode %{
diff --git a/src/hotspot/share/opto/compile.cpp b/src/hotspot/share/opto/compile.cpp
index 0a615aca430f7..788c4620b06c6 100644
--- a/src/hotspot/share/opto/compile.cpp
+++ b/src/hotspot/share/opto/compile.cpp
@@ -2692,7 +2692,7 @@ static bool is_vector_bitwise_op(Node* n) {
 }
 
 static bool is_vector_bitwise_cone_root(Node* n) {
-  if (n->bottom_type()->isa_vectmask() || !is_vector_bitwise_op(n)) {
+  if (n->bottom_type()->isa_pvectmask() || !is_vector_bitwise_op(n)) {
     return false;
   }
   for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
diff --git a/src/hotspot/share/opto/matcher.hpp b/src/hotspot/share/opto/matcher.hpp
index 4de41d6f2ef25..a3d0f8e7d6c65 100644
--- a/src/hotspot/share/opto/matcher.hpp
+++ b/src/hotspot/share/opto/matcher.hpp
@@ -341,7 +341,7 @@ class Matcher : public PhaseTransform {
 
   // Identify if a vector mask operation prefers the input/output mask to be
   // saved with a predicate type or not.
-  // - Return true if it prefers a predicate type (i.e. TypeVectMask).
+  // - Return true if it prefers a predicate type (i.e. TypePVectMask).
   // - Return false if it prefers a general vector type (i.e. TypeVectA to TypeVectZ).
   static bool mask_op_prefers_predicate(int opcode, const TypeVect* vt);
 
diff --git a/src/hotspot/share/opto/superword.cpp b/src/hotspot/share/opto/superword.cpp
index 53845a94c1c10..8acdf2b80002c 100644
--- a/src/hotspot/share/opto/superword.cpp
+++ b/src/hotspot/share/opto/superword.cpp
@@ -2487,7 +2487,7 @@ static bool can_subword_truncate(Node* in, const Type* type) {
   }
 
   // Vector nodes should not truncate.
-  if (type->isa_vect() != nullptr || type->isa_vectmask() != nullptr || in->is_Reduction()) {
+  if (type->isa_vect() != nullptr || type->isa_pvectmask() != nullptr || in->is_Reduction()) {
     return false;
   }
 
diff --git a/src/hotspot/share/opto/type.cpp b/src/hotspot/share/opto/type.cpp
index 308ec819773ee..f05cc5ae1e0b8 100644
--- a/src/hotspot/share/opto/type.cpp
+++ b/src/hotspot/share/opto/type.cpp
@@ -704,7 +704,7 @@ void Type::Initialize_shared(Compile* current) {
   // get_zero_type() should not happen for T_CONFLICT
   _zero_type[T_CONFLICT]= nullptr;
 
-  TypeVect::VECTMASK = (TypeVect*)(new TypeVectMask(T_BOOLEAN, MaxVectorSize))->hashcons();
+  TypeVect::VECTMASK = (TypeVect*)(new TypePVectMask(T_BOOLEAN, MaxVectorSize))->hashcons();
   mreg2type[Op_RegVectMask] = TypeVect::VECTMASK;
 
   if (Matcher::supports_scalable_vector()) {
@@ -2466,7 +2466,7 @@ const TypeVect* TypeVect::make(BasicType elem_bt, uint length, bool is_mask) {
 }
 
 // Create a vector mask type with the given element basic type and length.
-// - Returns "TypeVectMask" (PVectMask) for platforms that support the predicate
+// - Returns "TypePVectMask" (PVectMask) for platforms that support the predicate
 //   feature and it is implemented properly in the backend, allowing the mask to
 //   be stored in a predicate/mask register.
 // - Returns a normal vector type "TypeVectA ~ TypeVectZ" (NVectMask) otherwise,
@@ -2474,7 +2474,7 @@ const TypeVect* TypeVect::make(BasicType elem_bt, uint length, bool is_mask) {
 const TypeVect* TypeVect::makemask(BasicType elem_bt, uint length) {
   if (Matcher::has_predicated_vectors() &&
       Matcher::match_rule_supported_vector_masked(Op_VectorLoadMask, length, elem_bt)) {
-    return TypeVectMask::make(elem_bt, length);
+    return TypePVectMask::make(elem_bt, length);
   } else {
     return make(elem_bt, length);
   }
@@ -2574,8 +2574,8 @@ void TypeVect::dump2(Dict& d, uint depth, outputStream* st) const {
 }
 #endif
 
-const TypeVectMask* TypeVectMask::make(const BasicType elem_bt, uint length) {
-  return (TypeVectMask*) (new TypeVectMask(elem_bt, length))->hashcons();
+const TypePVectMask* TypePVectMask::make(const BasicType elem_bt, uint length) {
+  return (TypePVectMask*) (new TypePVectMask(elem_bt, length))->hashcons();
 }
 
 //=============================================================================
diff --git a/src/hotspot/share/opto/type.hpp b/src/hotspot/share/opto/type.hpp
index 135f37f726725..8ee0f06688bce 100644
--- a/src/hotspot/share/opto/type.hpp
+++ b/src/hotspot/share/opto/type.hpp
@@ -63,7 +63,7 @@ class     TypeVectD;
 class     TypeVectX;
 class     TypeVectY;
 class     TypeVectZ;
-class     TypeVectMask;
+class     TypePVectMask;
 class   TypePtr;
 class     TypeRawPtr;
 class     TypeOopPtr;
@@ -313,8 +313,8 @@ class Type {
   const TypeAry    *isa_ary() const;             // Returns null of not ary
   const TypeVect   *is_vect() const;             // Vector
   const TypeVect   *isa_vect() const;            // Returns null if not a Vector
-  const TypeVectMask *is_vectmask() const;       // Predicate/Mask Vector
-  const TypeVectMask *isa_vectmask() const;      // Returns null if not a Vector Predicate/Mask
+  const TypePVectMask *is_pvectmask() const;     // Predicate/Mask Vector
+  const TypePVectMask *isa_pvectmask() const;    // Returns null if not a Vector Predicate/Mask
   const TypePtr    *is_ptr() const;              // Asserts it is a ptr type
   const TypePtr    *isa_ptr() const;             // Returns null if not ptr type
   const TypeRawPtr *isa_rawptr() const;          // NOT Java oop
@@ -1108,14 +1108,14 @@ class TypeVectZ : public TypeVect {
   TypeVectZ(BasicType elem_bt, uint length) : TypeVect(VectorZ, elem_bt, length) {}
 };
 
-// Class of TypeVectMask, representing vector masks with "PVectMask" layout (see
+// Class of TypePVectMask, representing vector masks with "PVectMask" layout (see
 // vectornode.hpp for detailed notes on vector mask representations), mapped to
 // dedicated hardware predicate/mask registers.
-class TypeVectMask : public TypeVect {
+class TypePVectMask : public TypeVect {
 public:
   friend class TypeVect;
-  TypeVectMask(BasicType elem_bt, uint length) : TypeVect(VectorMask, elem_bt, length) {}
-  static const TypeVectMask* make(const BasicType elem_bt, uint length);
+  TypePVectMask(BasicType elem_bt, uint length) : TypeVect(VectorMask, elem_bt, length) {}
+  static const TypePVectMask* make(const BasicType elem_bt, uint length);
 };
 
 // Set of implemented interfaces. Referenced from TypeOopPtr and TypeKlassPtr.
@@ -2305,13 +2305,13 @@ inline const TypeAry *Type::isa_ary() const {
   return ((_base == Array) ? (TypeAry*)this : nullptr);
 }
 
-inline const TypeVectMask *Type::is_vectmask() const {
+inline const TypePVectMask *Type::is_pvectmask() const {
   assert( _base == VectorMask, "Not a Vector Mask" );
-  return (TypeVectMask*)this;
+  return (TypePVectMask*)this;
 }
 
-inline const TypeVectMask *Type::isa_vectmask() const {
-  return (_base == VectorMask) ? (TypeVectMask*)this : nullptr;
+inline const TypePVectMask *Type::isa_pvectmask() const {
+  return (_base == VectorMask) ? (TypePVectMask*)this : nullptr;
 }
 
 inline const TypeVect *Type::is_vect() const {
diff --git a/src/hotspot/share/opto/vector.cpp b/src/hotspot/share/opto/vector.cpp
index d35717c592229..f9fa02317bc19 100644
--- a/src/hotspot/share/opto/vector.cpp
+++ b/src/hotspot/share/opto/vector.cpp
@@ -365,7 +365,7 @@ Node* PhaseVector::expand_vbox_alloc_node(VectorBoxAllocateNode* vbox_alloc,
   // If boxed mask value is present in a predicate register, it must be
   // spilled to a vector though a VectorStoreMaskOperation before actual StoreVector
   // operation to vector payload field.
-  if (is_mask && (value->bottom_type()->isa_vectmask() || bt != T_BOOLEAN)) {
+  if (is_mask && (value->bottom_type()->isa_pvectmask() || bt != T_BOOLEAN)) {
     value = gvn.transform(VectorStoreMaskNode::make(gvn, value, bt, num_elem));
     // Although type of mask depends on its definition, in terms of storage everything is stored in boolean array.
     bt = T_BOOLEAN;
diff --git a/src/hotspot/share/opto/vectorIntrinsics.cpp b/src/hotspot/share/opto/vectorIntrinsics.cpp
index 7fc06db4b7843..f5162c4bb2f1e 100644
--- a/src/hotspot/share/opto/vectorIntrinsics.cpp
+++ b/src/hotspot/share/opto/vectorIntrinsics.cpp
@@ -1645,7 +1645,7 @@ bool LibraryCallKit::inline_vector_test() {
   Node* opd1 = unbox_vector(argument(4), vbox_type, elem_bt, num_elem);
   Node* opd2;
   if (Matcher::vectortest_needs_second_argument(booltest == BoolTest::overflow,
-                                                opd1->bottom_type()->isa_vectmask())) {
+                                                opd1->bottom_type()->isa_pvectmask())) {
     opd2 = unbox_vector(argument(5), vbox_type, elem_bt, num_elem);
   } else {
     opd2 = opd1;
@@ -1656,7 +1656,7 @@ bool LibraryCallKit::inline_vector_test() {
 
   Node* cmp = gvn().transform(trace_vector(new VectorTestNode(opd1, opd2, booltest)));
   BoolTest::mask test = Matcher::vectortest_mask(booltest == BoolTest::overflow,
-                                                 opd1->bottom_type()->isa_vectmask(), num_elem);
+                                                 opd1->bottom_type()->isa_pvectmask(), num_elem);
   Node* bol = gvn().transform(new BoolNode(cmp, test));
   Node* res = gvn().transform(new CMoveINode(bol, gvn().intcon(0), gvn().intcon(1), TypeInt::BOOL));
 
@@ -2421,8 +2421,8 @@ bool LibraryCallKit::inline_vector_convert() {
   // where certain masks (depending on the species) are either propagated
   // through a vector or predicate register.
   if (is_mask &&
-      ((src_type->isa_vectmask() == nullptr && dst_type->isa_vectmask()) ||
-       (dst_type->isa_vectmask() == nullptr && src_type->isa_vectmask()))) {
+      ((src_type->isa_pvectmask() == nullptr && dst_type->isa_pvectmask()) ||
+       (dst_type->isa_pvectmask() == nullptr && src_type->isa_pvectmask()))) {
     return false;
   }
 
diff --git a/src/hotspot/share/opto/vectornode.cpp b/src/hotspot/share/opto/vectornode.cpp
index d19aa476196ad..651a27af9c79e 100644
--- a/src/hotspot/share/opto/vectornode.cpp
+++ b/src/hotspot/share/opto/vectornode.cpp
@@ -1485,7 +1485,7 @@ static Node* convertFromLongToMaskAll(PhaseGVN* phase, const TypeLong* bits_type
     } else {
       con = phase->intcon(con_value);
     }
-    Node* res = VectorNode::scalar2vector(con, vlen, maskall_bt, vt->isa_vectmask() != nullptr);
+    Node* res = VectorNode::scalar2vector(con, vlen, maskall_bt, vt->isa_pvectmask() != nullptr);
     // Convert back to the original floating-point data type.
     if (is_floating_point_type(bt)) {
       res = new VectorMaskCastNode(phase->transform(res), vt);
@@ -1752,7 +1752,7 @@ MacroLogicVNode* MacroLogicVNode::make(PhaseGVN& gvn, Node* in1, Node* in2, Node
   assert(in1->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
   assert(in2->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
   assert(in3->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
-  assert(!mask || mask->bottom_type()->isa_vectmask(), "predicated register type expected");
+  assert(!mask || mask->bottom_type()->isa_pvectmask(), "predicated register type expected");
   Node* fn = gvn.intcon(truth_table);
   return new MacroLogicVNode(in1, in2, in3, fn, mask, vt);
 }
@@ -1962,7 +1962,7 @@ Node* VectorMaskGenNode::make(Node* length, BasicType mask_bt) {
 }
 
 Node* VectorMaskGenNode::make(Node* length, BasicType mask_bt, int mask_len) {
-  const TypeVectMask* t_vmask = TypeVectMask::make(mask_bt, mask_len);
+  const TypePVectMask* t_vmask = TypePVectMask::make(mask_bt, mask_len);
   return new VectorMaskGenNode(length, t_vmask);
 }
 
@@ -2051,7 +2051,7 @@ Node* VectorMaskToLongNode::Identity(PhaseGVN* phase) {
 Node* VectorLongToMaskNode::Ideal(PhaseGVN* phase, bool can_reshape) {
   const TypeVect* dst_type = bottom_type()->is_vect();
   uint vlen = dst_type->length();
-  const TypeVectMask* is_mask = dst_type->isa_vectmask();
+  const TypePVectMask* is_mask = dst_type->isa_pvectmask();
 
   // Pattern:      (VectorLongToMask (AndL (VectorMaskToLong src) mask))
   // Replace with: (VectorMaskCast src)
@@ -2065,7 +2065,7 @@ Node* VectorLongToMaskNode::Ideal(PhaseGVN* phase, bool can_reshape) {
     Node* src = in(1)->in(1)->in(1);
     const TypeVect* src_type = src->bottom_type()->is_vect();
     if (src_type->length() == vlen &&
-        ((src_type->isa_vectmask() == nullptr) == (is_mask == nullptr))) {
+        ((src_type->isa_pvectmask() == nullptr) == (is_mask == nullptr))) {
       return new VectorMaskCastNode(src, dst_type);
     }
   }
@@ -2398,7 +2398,7 @@ Node* XorVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
   if (!is_predicated_vector() && (in(1) == in(2))) {
     BasicType bt = vect_type()->element_basic_type();
     Node* zero = phase->transform(phase->zerocon(bt));
-    return VectorNode::scalar2vector(zero, length(), bt, bottom_type()->isa_vectmask() != nullptr);
+    return VectorNode::scalar2vector(zero, length(), bt, bottom_type()->isa_pvectmask() != nullptr);
   }
 
   Node* res = Ideal_XorV_VectorMaskCmp(phase, can_reshape);
diff --git a/src/hotspot/share/opto/vectornode.hpp b/src/hotspot/share/opto/vectornode.hpp
index 91cff9fcae899..897cedd6a1bff 100644
--- a/src/hotspot/share/opto/vectornode.hpp
+++ b/src/hotspot/share/opto/vectornode.hpp
@@ -49,7 +49,7 @@
 //
 // - PVectMask: Platform-specific mask stored in predicate/mask registers. Generated
 //   on architectures with predicate/mask feature, such as AArch64 SVE, x86 AVX-512,
-//   and RISC-V Vector Extension (RVV). The corresponding type is TypeVectMask.
+//   and RISC-V Vector Extension (RVV). The corresponding type is TypePVectMask.
 //
 // NVectMask and PVectMask encode element data type and vector length information.
 // They are the primary mask representations used in most mask and masked vector
@@ -1332,7 +1332,7 @@ class StoreVectorScatterMaskedNode : public StoreVectorNode {
      : StoreVectorNode(c, mem, adr, at, val) {
      init_class_id(Class_StoreVectorScatterMasked);
      assert(indices->bottom_type()->is_vect(), "indices must be in vector");
-     assert(mask->bottom_type()->isa_vectmask(), "sanity");
+     assert(mask->bottom_type()->isa_pvectmask(), "sanity");
      add_req(indices);
      add_req(mask);
      assert(req() == MemNode::ValueIn + 3, "match_edge expects that last input is in MemNode::ValueIn+2");
@@ -1887,7 +1887,7 @@ class VectorMaskCastNode : public VectorNode {
     assert(in_vt->length() == vt->length(), "vector length must match");
     assert((in_vt->element_basic_type() == T_BOOLEAN) == (vt->element_basic_type() == T_BOOLEAN),
            "Cast from/to BVectMask not allowed, use VectorLoadMask/VectorStoreMask instead");
-    assert((in_vt->isa_vectmask() == nullptr) == (vt->isa_vectmask() == nullptr),
+    assert((in_vt->isa_pvectmask() == nullptr) == (vt->isa_pvectmask() == nullptr),
            "Both BVectMask, or both NVectMask, or both PVectMask");
   }
   Node* Identity(PhaseGVN* phase);
@@ -1904,7 +1904,7 @@ class VectorReinterpretNode : public VectorNode {
  public:
   VectorReinterpretNode(Node* in, const TypeVect* src_vt, const TypeVect* dst_vt)
      : VectorNode(in, dst_vt), _src_vt(src_vt) {
-     assert((!dst_vt->isa_vectmask() && !src_vt->isa_vectmask()) ||
+     assert((!dst_vt->isa_pvectmask() && !src_vt->isa_pvectmask()) ||
             (type2aelembytes(src_vt->element_basic_type()) >= type2aelembytes(dst_vt->element_basic_type())),
             "unsupported mask widening reinterpretation");
      init_class_id(Class_VectorReinterpret);