Merge branch 'master' of https://github.com/86Box/86Box

Author: OBattler

src/floppy/fdc.c

@@ -1522,9 +1522,13 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                                     if ((fdc->params[1] - fdc->pcn[fdc->params[0] & 3]) == 0) {
                                         fdc_log("Failed seek\n");
                                         fdc->st0 = 0x20 | (fdc->params[0] & 3);
-                                        /* Always use the PCjr code, so both 386BSD and 1B/V3 work. */
+                                        /* Default to polled completion for 386BSD and 1B/V3 compatibility. */
                                         fdc->fintr     = 1;
                                         fdc->interrupt = -4;
+                                        if (fdc->flags & FDC_FLAG_IRQ_ON_NOOP_SEEK) {
+                                            fdc->interrupt = -3;
+                                            fdc_callback(fdc);
+                                        }
                                         break;
                                     }
                                     if (fdc->params[1] > fdc->pcn[fdc->params[0] & 3])

src/include/86box/fdc.h

@@ -62,6 +62,7 @@
 #define FDC_FLAG_5550           0x200000 /* IBM Multistation 5550 */
 #define FDC_FLAG_NO_TDR         0x400000 /* Has no tape drive register */
 #define FDC_FLAG_PCJX           0x800000 /* IBM PC JX no-DMA adapter */
+#define FDC_FLAG_IRQ_ON_NOOP_SEEK 0x1000000 /* Interrupt on zero-step SEEK completion */
 
 typedef struct sector_id_fields_t {
     uint8_t c;

tests/README.md

@@ -27,6 +27,8 @@ Build `fdc_read_id_tests` with `BUILD_TESTING=ON`, then run `ctest --test-dir bu
 
 The tests use the real FDC/FDD/IMG/D86F path to check immediate missing-head errors and normal bitstream Read ID completion in DMA and non-DMA modes. They adapt host timers, interrupts and file services; Read ID has no DMA payload, so this is not a DMA-transfer test. The fixture includes FDC/FDD as C-in-C++ for private device access, compiles IMG/D86F/FIFO/CRC as C, and uses portable filesystem temporary directories.
 
+The same fixture checks zero-step SEEK completion with `FDC_FLAG_IRQ_ON_NOOP_SEEK` enabled and disabled, including the DOR interrupt gate and successful Sense Interrupt Status without head movement. The default retains the polled compatibility behavior introduced by commit `e140db7d1` for 386BSD and 1B/V3. The Convertible opts into interrupts because its BIOS power-on recovery waits for IRQ6 even when restoring cylinder zero.
+
 # Cartridges
 
 The cartridge tests compile `src/device/cartridge.c` as C and exercise raw and headered image loading, replacement/ejection, overlap and address bounds, and hard-reset reloads. They use real temporary image files with a small external-memory mapping adapter; they do not emulate CPU execution, RAM/BIOS arbitration, or the real memory mapping cache.

tests/floppy/fdc_read_id_test.cpp

@@ -19,6 +19,8 @@ extern "C" {
 }
 
 namespace {
+uint16_t asserted_irqs;
+
 
 // Exercise the real FDC -> FDD -> IMG/D86F path. Only host services are adapted;
 // in particular, no adapter synthesizes a controller completion or media error.
@@ -182,6 +184,29 @@ TEST_F(FdcReadId, PresentHeadCompletesThroughRealBitstream)
     }
 }
 
+TEST_F(FdcReadId, NoMovementSeekInterruptIsOptInAndRespectsDorGate)
+{
+    for (bool enabled : { false, true }) {
+        for (bool irq_gate : { false, true }) {
+            SCOPED_TRACE(::testing::Message() << "option=" << enabled << " DOR IRQ gate=" << irq_gate);
+            controller.flags = enabled ? FDC_FLAG_IRQ_ON_NOOP_SEEK : 0;
+            controller.reset_stat = 0;
+            fdc_write(0x3f2, irq_gate ? 0x1c : 0x14, &controller);
+            asserted_irqs = 0;
+
+            command(0x0f, { 0, 0 });
+            EXPECT_EQ(asserted_irqs & (1 << 6), enabled && irq_gate ? (1 << 6) : 0);
+            EXPECT_EQ(fdc_read(0x3f4, &controller) & 0xf0, 0x80);
+            command(0x08, {});
+            const auto status = result();
+            ASSERT_EQ(status.size(), 2u);
+            EXPECT_EQ(status[0], 0x20);
+            EXPECT_EQ(status[1], 0);
+            EXPECT_EQ(fdd_current_track(0), 0);
+        }
+    }
+}
+
 } // namespace
 
 // Host adapters: deterministic clock, no PIC/DMA bus or UI/audio, ordinary files.
@@ -223,8 +248,9 @@ timer_add(pc_timer_t *timer, void (*callback)(void *), void *priv, int start)
     timer->flags    = start ? TIMER_ENABLED : 0;
 }
 void
-picint_common(uint16_t, int, int, uint8_t *)
+picint_common(uint16_t mask, int, int, uint8_t *)
 {
+    asserted_irqs |= mask;
 }
 void
 dma_set_drq(int, int)