prod-zig.env.example

# Candidate profile for the upstream-native migration; historical measurements do not qualify this pin.
# The current pin includes flash17 dsq-1 admission; pack/device/API qualification remains pending. See docs/ENGINE.md.
# Previous TP=2 Zig serving profile, for the q28-v2 pack: the serving set measured in docs/ZIG-RESULTS.md.
# The recommended profile is config/prod-zig-flash17.env.example (flash17); this one is its rollback.
# Copy to config/prod-zig.env on EACH node; set these node-local paths and link settings.
# This profile requires the CUDA Zig port and generated assets described in docs/ZIG-SERVE.md,
# including an AOT fill that covers 4K prefill pieces, replay runs and the INDEX_BOUND twins.
IMAGE="<your-built-zig-image>"
TF_TP_MASTER="<rank-0-link-address>"
TF_TP_PORT=29571
TF_COMM_BACKEND=roce
NCCL_SOCKET_IFNAME="<link-interface>"
NCCL_IB_HCA="<cabled-RDMA-devices>"
MODEL_DIR="<absolute-model-directory>"
ENGRAM_DIR="<absolute-rank-specific-engram-directory>"
ASSETS_DIR="<absolute-rank-specific-assets-directory>"
PREPARED_DIR="<absolute-zig-prepared-directory>"
STATE_DIR="<absolute-state-directory>"
CACHE_DIR="<absolute-calibration-directory>"
HOST=localhost
PORT=8000
# rope.bin needs CONTEXT + 2048 rows; pass --rows explicitly to the asset generator (the 1M assets cover 196608).
# Prompt + output per request. For single requests past 192K use TF_DSV41_CONTEXT=1048576 with TF_DSV41_SLOTS=4.
TF_DSV41_CONTEXT=196608
TF_DSV41_ASSETS=/assets

# Engine values exported from the serving profile, with the measured all-on additions.
TF_DSV41_R1=1
TF_DSV41_DRAFTS=1
TF_DSV41_OWN_PREFILL=1
TF_DSV41_GRAPHS=1
TF_DSV41_SAMPLING=1
TF_DSV41_SLOTS=8
TF_DSV41_SLOT_DRAFTS=1
# Paged KV pool shared by the slots: 3.0M tokens with split KV (8 live slots at the full CONTEXT need 1.57M).
TF_DSV41_POOL_TOKENS=3000000
# Split KV: compressed KV rows sharded over the ranks instead of replicated (TP >= 2; see docs/ZIG-SERVE.md).
TF_DSV41_KV_SPLIT=1
# Split KV's owner-packed exchange where every rank's transport takes device lengths (otherwise the dense exchange).
TF_DSV41_KV_SPLIT_COMPACT=1
# Dense weight forms written over their trellis instead of beside it (frees their copy for the pool).
TF_DSV41_FORMS_INPLACE=1
TF_DSV41_EXPERT_TOPP=0.85
TF_DSV41_ENGRAM_DIR=/engram
TF_DSV41_PREPARED=/prepared
TF_DSV41_PREPARED_WRITE=1
TF_TP_PLAN_TIMEOUT=1800
TF_DSV41_SESSIONS=1
TF_DSV41_SESSION_RAM_MIB=256
TF_DSV41_SESSION_DISK=/sessions
TF_DSV41_SESSION_DISK_GIB=128
TF_DSV41_SESSION_DISK_MIN=1024
TF_DSV41_FLOOR_GIB=5
TF_DSV41_FLOOR_HARD_GIB=4
TENSORFOLD_REQUEST_LOG=/state/requests.jsonl
# Seconds requests in progress may finish after SIGTERM / SIGINT before both ranks stop at a round boundary.
TF_DRAIN_S=20
# Seconds between keepalives on a stream that has not sent its first token (0: none).
TF_SSE_KEEPALIVE_S=15
TF_DSV41_THINKING=1
TF_DSV41_DEFAULT_EFFORT=high
TF_DSV41_SCHEMA_PROMPT=1
# Image input: DeepSeek's vision tower on rank 0 (placeholder: each image becomes a notice; reject: HTTP 400).
TF_DSV41_IMAGES=native
# Folder in the /cache mount holding bias_vl.safetensors (both ranks; see docs/IMAGES.md); unset: the text bias.
TF_DSV41_BIAS_VL=/cache/dsv41-bias-vl
TF_TP_MAILBOX_MAX_KB=1024
TF_DSV41_INDEX_BUDGET_MIB=64
TF_DSV41_PREFETCH_AHEAD=1
TF_DSV41_SPEC_DRAFT=1
TF_DSV41_DRAFT_GRAPHS=1
TF_DSV41_ROWS_CAP=64
# Structured output (response_format, required or named tool_choice) through grammar masks on every rank
# (1, the engine default); 0 refuses it. Both ranks must agree.
TF_DSV41_GRAMMAR=1
TENSORFOLD_TOOL_GRAMMAR=0
TF_DSV41_PF_DENSE=fused
# Copy config/pfdense-table.json into CACHE_DIR before startup
TF_DSV41_PF_DENSE_TABLE=/cache/pfdense-table.json
TF_TP_PLAN_LINK=rdma
TF_TP_PLAN_PIN=auto
TF_DSV41_L2PF=1
TF_DSV41_L2PF_MB=12
TF_DSV41_L2PF_PACE_GBPS=150
TF_DSV41_DEPTH_JOINT=0
TF_DSV41_ENGRAM_GATE=1
TF_DSV41_BRANCHES=1
TF_DSV41_BRANCHES_PRIO=side
TF_DSV41_MHC_DEFER=1
TF_TP_ROCE_FAST=1
TF_DSV41_GREEDY_GPU=1
TF_DSV41_PREFILL=replay
TF_DSV41_GM_V2=1
# Final serving set: the 40 settings the measured serving boot applied over the profile above (later values win;
# shown here once, with their effective values). Each is default-off in the engine and opted into here.
TF_DSV41_PREFILL_PIECES=1
TF_DSV41_SESSION_SLOTS=1
TF_DSV41_TAIL_JOIN=1
TF_DSV41_DRAFT_TIMED=1
TF_DSV41_CODE_ACCEPT=0
TF_DSV41_ROUTER_GROUP_ROT=1
TF_DSV41_MHC_PFDEC=17
TF_DSV41_DRAFT_BATCH_PROJ=1
TF_DSV41_DRAFT_CHAIN=1
TF_DSV41_DRAFT_OVERLAP=1
TF_DSV41_ROUND_GRAPH=1
TF_DSV41_KV_NORM_STORE=1
TF_DSV41_LOOKUP_PLAN=1
TF_DSV41_JOIN_DRAFTS=1
TF_DSV41_PIECE_RUNS=1
TF_DSV41_REPLAY_RUNS=1
TF_DSV41_PF_4K=1
TF_DSV41_PF_4K_MEMORY_OK=1
TF_DSV41_PREFILL_CHUNK=4096
TF_DSV41_PREFILL_ROWS=4096
TF_DSV41_PF_WS_FLOOR_GIB=3.5
TF_DSV41_ENGRAM_AIO=1
TF_DSV41_DRAFT_CAPTURE=1
TF_DSV41_MHC_DEFER_AT=exchange
TF_DSV41_LIN2=1
TF_DSV41_GRAPH_FLOOR=hold
TF_DSV41_PF_WS_SHARE=1
TF_DSV41_INDEX_BOUND=1
# Draft pricing from this engine's own boot measurement: the first boot times its windows on every rank and stores
# calib-zig-<shape>.json in CALIB_DIR; later boots read it. Pin one measured table with CALIB_FILE once you have it.
TF_DSV41_CALIB=zig
TF_DSV41_CALIB_DIR=/state/calib-zig
# TF_DSV41_CALIB_FILE=/state/calib-zig/<calib-zig-file>.json

# 4K prefill falls back to 2K segments (same bits) when either rank cannot keep PF_WS_FLOOR_GIB free.
# For a conservative 2K profile set PF_4K=0, drop PF_4K_MEMORY_OK and PF_WS_FLOOR_GIB, and use CHUNK / ROWS 2048.
# Changing these (or slots, rows cap, context) changes the AOT set: run scripts/run-zig.sh N --check-aot and compile
# what it reports (docs/ZIG-SERVE.md, "Changing serving settings").

# Compute lane and in-model runner: off. Every name the flash17 profile's compute default sets is set here, so none of
# its values survives from a shell that exported that profile (the launcher forwards engine settings from the calling
# shell too). Empty means unset; the runner settings are unread while their switches are 0.
TF_DSV41_COMPUTE_LANE=0
TF_DSV41_COMPUTE_LANE_DEFAULT=0
TF_DSV41_COMPUTE_LANE_RUNNER=0
TF_DSV41_RUNNER=0
TF_DSV41_RUNNER_COMMIT=0
TF_DSV41_RUNNER_STATED=0
TF_DSV41_RUNNER_INLINE_CHAIN=0
TF_DSV41_RUNNER_INLINE_MARK=0
TF_DSV41_RUNNER_SYNC_GRAPH=0
TF_DSV41_RUNNER_FORMS=
TF_DSV41_RUNNER_CIRCUIT=
TF_DSV41_RUNNER_BACKEND=
TF_DSV41_RUNNER_GRAPH_BANK=
TF_DSV41_RUNNER_COMPILE_STEPS=
TF_DSV41_RUNNER_CELLS=
TF_DSV41_COMPUTE_LANE_RUNNER_CIRCUIT=
TF_DSV41_COMPUTE_LANE_RUNNER_BACKEND=
TF_DSV41_COMPUTE_LANE_RUNNER_GRAPH_BANK=
TF_DSV41_COMPUTE_LANE_RUNNER_SETTLE_US=
TF_DSV41_RUNNER_SPANS=
TF_DSV41_RUNNER_DIGIT_HOLD_MAX=
TF_DSV41_RUNNER_MARK_STOP=

# Explicit opt-ins in the public source export.
export TF_DSV41_LOOKUP=1
export TF_DSV41_ENGRAM_PREFETCH=1

# Rank-local HCA selector, forwarded unchanged (rootsbymenda, #63):
# TF_TP_ROCE_HCA="<cabled-RDMA-device>:<port>"
CONTAINER_PREFIX=tensorfold-zig

# Head-side pair supervision (serve.sh). Paths must be absolute; configure both nodes first.
# WORKER_SSH="<worker-ssh-target>"
# WORKER_REPO="<absolute-worker-recipe-checkout>"
# WORKER_CONFIG="<absolute-worker-prod-zig.env>"
WATCH_HEAL=0
# WATCH_FAILS=3
# WATCH_MIN_HEAL=300
# READY_TIMEOUT=900
# MAINTENANCE_LEASE="<absolute-maintenance-lease-file>"
# Optional per-rank host CPU affinity; include the exact value in a guard profile.
# CPUSET_CPUS="<cpu-list>"

# Optional head-only native auth: nonempty mode-0600 file owned by you or root, outside
# the checkout and data directories, mounted read-only (docs/SECURITY.md).
# NATIVE_AUTH_FILE="<absolute-head-auth-file>"