From b241ae24e1a7fdbe9d63d37df8574bc825e73849 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Wed, 27 May 2026 10:24:51 +0200 Subject: [PATCH] Fix metadata mistakes --- esp-metadata-generated/src/_build_script_utils.rs | 4 ++++ esp-metadata-generated/src/_generated_esp32c61.rs | 6 ++++++ esp-metadata/devices/esp32c61.toml | 2 +- esp-metadata/devices/esp32p4.toml | 1 - esp-metadata/devices/esp32s2.toml | 2 -- esp-metadata/src/cfg.rs | 1 + 6 files changed, 12 insertions(+), 4 deletions(-) diff --git a/esp-metadata-generated/src/_build_script_utils.rs b/esp-metadata-generated/src/_build_script_utils.rs index 53d38ca26d0..dc947c47b97 100644 --- a/esp-metadata-generated/src/_build_script_utils.rs +++ b/esp-metadata-generated/src/_build_script_utils.rs @@ -3316,6 +3316,8 @@ impl Chip { "rng_apb_cycle_wait_num=\"16\"", "sha_dma", "soc_cpu_has_branch_predictor", + "soc_cpu_csr_prv_mode=\"2064\"", + "soc_cpu_csr_prv_mode_is_set", "soc_rc_fast_clk_default=\"17500000\"", "soc_rc_fast_clk_default_is_set", "soc_has_clock_node_xtal_clk", @@ -3524,6 +3526,8 @@ impl Chip { "cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"", "cargo:rustc-cfg=sha_dma", "cargo:rustc-cfg=soc_cpu_has_branch_predictor", + "cargo:rustc-cfg=soc_cpu_csr_prv_mode=\"2064\"", + "cargo:rustc-cfg=soc_cpu_csr_prv_mode_is_set", "cargo:rustc-cfg=soc_rc_fast_clk_default=\"17500000\"", "cargo:rustc-cfg=soc_rc_fast_clk_default_is_set", "cargo:rustc-cfg=soc_has_clock_node_xtal_clk", diff --git a/esp-metadata-generated/src/_generated_esp32c61.rs b/esp-metadata-generated/src/_generated_esp32c61.rs index 2c36db4d157..0ee1b1fd291 100644 --- a/esp-metadata-generated/src/_generated_esp32c61.rs +++ b/esp-metadata-generated/src/_generated_esp32c61.rs @@ -298,6 +298,12 @@ macro_rules! property { ("soc.multi_core_enabled") => { false }; + ("soc.cpu_csr_prv_mode") => { + 2064 + }; + ("soc.cpu_csr_prv_mode", str) => { + stringify!(2064) + }; ("soc.rc_fast_clk_default") => { 17500000 }; diff --git a/esp-metadata/devices/esp32c61.toml b/esp-metadata/devices/esp32c61.toml index 55008bdfcfd..b725d63cef6 100644 --- a/esp-metadata/devices/esp32c61.toml +++ b/esp-metadata/devices/esp32c61.toml @@ -23,7 +23,7 @@ symbols = [ [device.soc] cpu_has_branch_predictor = true cpu_has_csr_pc = false -cpu_has_prv_mode = true # TODO +cpu_csr_prv_mode = 0x810 rc_fast_clk_default = 17_500_000 memory_map = { ranges = [ diff --git a/esp-metadata/devices/esp32p4.toml b/esp-metadata/devices/esp32p4.toml index 20163d98d4a..f5bd89a21ce 100644 --- a/esp-metadata/devices/esp32p4.toml +++ b/esp-metadata/devices/esp32p4.toml @@ -531,7 +531,6 @@ supports_enhanced_security = true [device.gpio] support_status = "partial" has_bank_1 = true -separate_in_out_interrupts = true gpio_function = 1 constant_0_input = 0x3E constant_1_input = 0x3F diff --git a/esp-metadata/devices/esp32s2.toml b/esp-metadata/devices/esp32s2.toml index 69b52a0c8e1..3114231d390 100644 --- a/esp-metadata/devices/esp32s2.toml +++ b/esp-metadata/devices/esp32s2.toml @@ -300,8 +300,6 @@ engines = [ support_status = "supported" has_bank_1 = true gpio_function = 1 -input_signal_max = 204 -output_signal_max = 256 constant_0_input = 0x3c constant_1_input = 0x38 pins = [ diff --git a/esp-metadata/src/cfg.rs b/esp-metadata/src/cfg.rs index bf52e004e0e..44f49d80f15 100644 --- a/esp-metadata/src/cfg.rs +++ b/esp-metadata/src/cfg.rs @@ -138,6 +138,7 @@ macro_rules! driver_configs { } ) => { #[derive(Debug, Clone, serde::Deserialize)] + #[serde(deny_unknown_fields)] pub(crate) struct $struct { #[serde(default)] #[serde(deserialize_with = "crate::support_status::string_or_struct")]