fix(i2s): ESP32 reset_tx/reset_rx too fast for hardware#5609
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On ESP32, `reset_tx()` and `reset_rx()` use `toggle()` which asserts and deasserts the reset bits (tx_reset, tx_fifo_reset, out_rst) in back-to-back register writes. The hardware does not register the reset pulse, causing `tx_start()` to hang forever on the next transfer. Replace `toggle()` with explicit assert → read-back barrier → deassert. The register read forces the bus write to complete before the clear, giving the hardware enough time to process the reset. Tested on M5Stack Core2 v1.1 (ESP32-D0WDQ6-V3): 20+ consecutive `write_words()` calls succeed with this fix (previously hung on the 2nd call). Full reproduction and PAC-based workaround: https://github.com/okhsunrog/m5core2v1-1_demo_rust Fixes esp-rs#5608
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I would like to see a test case covering this, even though i2s tests are disabled for esp32 |
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On ESP32,
reset_tx()andreset_rx()usetoggle()which assertsand deasserts the reset bits in two back-to-back
modify()calls.The pulse is too short for the I2S peripheral to register, leaving
the DMA engine in a stale state and causing
tx_start()to hang onsubsequent transfers.
Fix by replacing
toggle()with explicit assert → register read-back→ deassert. The read-back acts as a bus round-trip delay, ensuring
the reset is registered before it is released.
Tested on ESP32-D0WDQ6-V3 (M5Stack Core2 v1.1) with IMA ADPCM audio
playback over I2S1 + NS4168 speaker amplifier — 20+ consecutive
write_words()calls succeed, three different audio clips playback-to-back without hangs.
Closes #5608
Changelog
esp-hal
reset_tx()/reset_rx()hanging on subsequent transfers due to reset pulse being too short for hardware