diff --git a/esp-hal/src/interrupt/riscv/clic.rs b/esp-hal/src/interrupt/riscv/clic.rs
index 03c908d4502..4aa0bfe4529 100644
--- a/esp-hal/src/interrupt/riscv/clic.rs
+++ b/esp-hal/src/interrupt/riscv/clic.rs
@@ -207,7 +207,7 @@ _mtvt_table:
 );
 
 // Core 2
-#[cfg(multi_core)]
+#[cfg(all(feature = "rt", multi_core))]
 core::arch::global_asm!(
     r#"
     .section .trap, "ax"