From 0fb9552c3455ca27b88c4c1ff5dd358c32f354fc Mon Sep 17 00:00:00 2001 From: Xeonacid Date: Wed, 19 Aug 2026 10:14:31 +0200 Subject: [PATCH] [jsg] Add Linux riscv64 register state for V8 stack sampling Mirrors from FillRegisterState() in v8/src/libsampler/sampler.cc --- src/workerd/jsg/setup.c++ | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/workerd/jsg/setup.c++ b/src/workerd/jsg/setup.c++ index 5647f0776fb..677a6b5b368 100644 --- a/src/workerd/jsg/setup.c++ +++ b/src/workerd/jsg/setup.c++ @@ -779,6 +779,11 @@ kj::Maybe getJsStackTrace(void* ucontext, kj::ArrayPtr scra state.sp = reinterpret_cast(mcontext.sp); state.fp = reinterpret_cast(mcontext.regs[29]); state.lr = reinterpret_cast(mcontext.regs[30]); +#elif defined(__linux__) && defined(__riscv) + state.pc = reinterpret_cast(mcontext.__gregs[REG_PC]); + state.sp = reinterpret_cast(mcontext.__gregs[REG_SP]); + state.fp = reinterpret_cast(mcontext.__gregs[REG_S0]); + state.lr = reinterpret_cast(mcontext.__gregs[REG_RA]); #else #error "Please add architecture support. See FillRegisterState() in v8/src/libsampler/sampler.cc" #endif