From c4a79f50602b9cce27c4fbe2b78c7051c90bb94d Mon Sep 17 00:00:00 2001 From: Aditya Naik Date: Wed, 27 May 2026 20:01:56 -0700 Subject: [PATCH 1/3] [Scala3] Add missing SimLog.printf overload; move SimLogSpec --- .../src/main/scala-3/chisel3/SimLogIntf.scala | 24 ++++++++++++++++++- .../chiselTests/SimLogSpec.scala | 0 2 files changed, 23 insertions(+), 1 deletion(-) rename src/test/{scala-2 => scala}/chiselTests/SimLogSpec.scala (100%) diff --git a/core/src/main/scala-3/chisel3/SimLogIntf.scala b/core/src/main/scala-3/chisel3/SimLogIntf.scala index 92d933cd434..2bc7f520362 100644 --- a/core/src/main/scala-3/chisel3/SimLogIntf.scala +++ b/core/src/main/scala-3/chisel3/SimLogIntf.scala @@ -2,6 +2,28 @@ package chisel3 +import chisel3.experimental.SourceInfo + private[chisel3] trait SimLogIntf { self: SimLog => - // TODO implement macro for Scala 3 + + /** Prints a message in simulation + * + * Prints a message every cycle. If defined within the scope of a + * [[when]] block, the message will only be printed on cycles that + * the when condition is true. + * + * Does not fire when in reset (defined as the encapsulating + * Module's reset). If your definition of reset is not the + * encapsulating Module's reset, you will need to gate this + * externally. + * + * May be called outside of a Module (like defined in a function), + * uses the current default clock and reset. These can be overriden + * with [[withClockAndReset]]. + * + * @param fmt printf format string + * @param data format string varargs containing data to print + */ + def printf(fmt: String, data: Bits*)(using sourceInfo: SourceInfo): chisel3.printf.Printf = + self.printf(Printable.pack(fmt, data*)) } diff --git a/src/test/scala-2/chiselTests/SimLogSpec.scala b/src/test/scala/chiselTests/SimLogSpec.scala similarity index 100% rename from src/test/scala-2/chiselTests/SimLogSpec.scala rename to src/test/scala/chiselTests/SimLogSpec.scala From 9611c3aa815cc80e47d167d69b68b9bb726ed374 Mon Sep 17 00:00:00 2001 From: Aditya Naik <91489422+adkian-sifive@users.noreply.github.com> Date: Tue, 2 Jun 2026 21:48:47 -0700 Subject: [PATCH 2/3] Update core/src/main/scala-3/chisel3/SimLogIntf.scala Co-authored-by: Jack Koenig --- core/src/main/scala-3/chisel3/SimLogIntf.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/core/src/main/scala-3/chisel3/SimLogIntf.scala b/core/src/main/scala-3/chisel3/SimLogIntf.scala index 2bc7f520362..0fd971ac467 100644 --- a/core/src/main/scala-3/chisel3/SimLogIntf.scala +++ b/core/src/main/scala-3/chisel3/SimLogIntf.scala @@ -24,6 +24,6 @@ private[chisel3] trait SimLogIntf { self: SimLog => * @param fmt printf format string * @param data format string varargs containing data to print */ - def printf(fmt: String, data: Bits*)(using sourceInfo: SourceInfo): chisel3.printf.Printf = + def printf(fmt: String, data: Bits*)(using SourceInfo): chisel3.printf.Printf = self.printf(Printable.pack(fmt, data*)) } From a44ab5b2701ef3cf193b4c406328346f6353f40c Mon Sep 17 00:00:00 2001 From: Aditya Naik Date: Tue, 2 Jun 2026 22:15:27 -0700 Subject: [PATCH 3/3] Add format string description to Scala 3 SimLogIntf --- .../src/main/scala-3/chisel3/SimLogIntf.scala | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/core/src/main/scala-3/chisel3/SimLogIntf.scala b/core/src/main/scala-3/chisel3/SimLogIntf.scala index 0fd971ac467..0f4d91bf16d 100644 --- a/core/src/main/scala-3/chisel3/SimLogIntf.scala +++ b/core/src/main/scala-3/chisel3/SimLogIntf.scala @@ -21,6 +21,35 @@ private[chisel3] trait SimLogIntf { self: SimLog => * uses the current default clock and reset. These can be overriden * with [[withClockAndReset]]. * + * ==Format Strings== + * + * This method expects a ''format string'' and an ''argument list'' + * in a similar style to printf in C. The format string expects a + * [[scala.Predef.String String]] that may contain ''format + * specifiers'' For example: + * {{{ + * printf("myWire has the value %d\n", myWire) + * }}} + * This prints the string "myWire has the value " followed by + * the current value of `myWire` (in decimal, followed by a + * newline. + * + * There must be exactly as many arguments as there are format specifiers + * + * ===Format Specifiers=== + * + * Format specifiers are prefixed by `%`. If you wish to print a + * literal `%`, use `%%`. + * - `%d` - Decimal + * - `%x` - Hexadecimal + * - `%b` - Binary + * - `%c` - 8-bit Character + * - `%n` - Name of a signal + * - `%N` - Full name of a leaf signal (in an aggregate) + * - `%%` - Literal percent + * - `%m` - Hierarchical name of the current module + * - `%T` - Simulation time + * * @param fmt printf format string * @param data format string varargs containing data to print */