From 53ec28af555efd0f3c0e49d57eac45d00943b73a Mon Sep 17 00:00:00 2001 From: Ricardo Pardini Date: Tue, 4 Aug 2026 20:29:20 +0200 Subject: [PATCH 1/2] recomputer-rk3588-devkit: add `BRANCH=edge` and mainline kernel DT - DeviceTree will be submitted to LKML separately - identical across v7.1 and v7.2 - board file: - make way for `edge` by sprinkling "only for vendor" shortcircuits in strategic places - use a case/esac to gate `aic8800` extension, extra packages, and `recomputer-rk35xx-common.inc` sourcing - series: - `arm64: dts: rockchip: describe PCIe RTL8125 Ethernet on reComputer RK3588` - `arm64: dts: rockchip: Add NPU to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add cooling fan to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add 40-pin header to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add mini PCIe slot to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add analog audio to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add HDMI input to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add HDMI to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add M.2 slots to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add PCIe Ethernet to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add DisplayPort to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add USB Type-C to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add USB host to Seeed reComputer RK3588 Dev Kit` - `arm64: dts: rockchip: Add Seeed reComputer RK3588 Dev Kit` - `dt-bindings: arm: rockchip: Add Seeed Studio reComputer RK3588 Dev Kit` --- config/boards/recomputer-rk3588-devkit.conf | 26 +- .../dt/rk3588-recomputer-devkit.dts | 1476 +++++++++++++++++ .../dt/rk3588-recomputer-devkit.dts | 1476 +++++++++++++++++ 3 files changed, 2973 insertions(+), 5 deletions(-) create mode 100644 patch/kernel/archive/rockchip64-7.1/dt/rk3588-recomputer-devkit.dts create mode 100644 patch/kernel/archive/rockchip64-7.2/dt/rk3588-recomputer-devkit.dts diff --git a/config/boards/recomputer-rk3588-devkit.conf b/config/boards/recomputer-rk3588-devkit.conf index 4f910b3adeec..35c264917476 100644 --- a/config/boards/recomputer-rk3588-devkit.conf +++ b/config/boards/recomputer-rk3588-devkit.conf @@ -6,7 +6,7 @@ BOARD_VENDOR="seeed-studio" INTRODUCED="2025" BOOTCONFIG="recomputer-rk3588-devkit_defconfig" # vendor name, not standard, see hook below, set BOOT_SOC below to compensate BOOT_SOC="rk3588" -KERNEL_TARGET="vendor" +KERNEL_TARGET="vendor,edge" KERNEL_TEST_TARGET="vendor" FULL_DESKTOP="yes" BOOT_LOGO="desktop" @@ -16,21 +16,35 @@ BOOT_SUPPORT_SPI="yes" BOOT_SPI_RKSPI_LOADER="yes" IMAGE_PARTITION_TABLE="gpt" OTA_ENABLE="yes" -SERIALCON="ttyFIQ0,ttyGS0" BT_UART="/dev/ttyS6" -PACKAGE_LIST_BOARD="net-tools rfkill pulseaudio-module-bluetooth fail2ban" AIC8800_TYPE="sdio" -enable_extension "radxa-aic8800" -source "${SRC}/config/sources/vendors/seeed-studio/recomputer-rk35xx-common.inc" +# select case for BRANCH=vendor to source the Seeed Studio recomputer-rk35xx-common.inc +case "${BRANCH}" in + vendor) + enable_extension "radxa-aic8800" + declare -g PACKAGE_LIST_BOARD="net-tools rfkill pulseaudio-module-bluetooth fail2ban" + declare -g SERIALCON="ttyFIQ0,ttyGS0" + source "${SRC}/config/sources/vendors/seeed-studio/recomputer-rk35xx-common.inc" + ;; + + *) + # @TODO: there is no aic8800 support for kernel > v7.0 yet + # mainline DTB name is different + display_alert "$BOARD" "Using mainline kernel DTB: rockchip/rk3588-recomputer-devkit.dtb -> boot_fdt_file" "warn" + declare -g BOOT_FDT_FILE="rockchip/rk3588-recomputer-devkit.dtb" + ;; +esac function post_family_config__recomputer_rk3588_devkit_use_seeed_bootscript() { + [[ "${BRANCH}" == "vendor" ]] || return 0 # only for BRANCH=vendor display_alert "$BOARD" "Using Seeed bootscript: boot-seeed-rk35xx.cmd -> boot.cmd" "info" declare -g BOOTSCRIPT="boot-seeed-rk35xx.cmd:boot.cmd" } # Install libmali package for RK3588 GPU userspace function pre_install_distribution_specific__recomputer_rk3588_install_libmali() { + [[ "${BRANCH}" == "vendor" ]] || return 0 # only for BRANCH=vendor display_alert "Installing Mali GPU libraries from APT repo" "libmali-g610" "info" seeed_recomputer_install_from_apt libmali-valhall-g610-g24p0-x11-wayland-gbm @@ -39,6 +53,7 @@ function pre_install_distribution_specific__recomputer_rk3588_install_libmali() # Install RK camera engine package for RK3588 function pre_install_distribution_specific__recomputer_rk3588_install_camera_engine() { + [[ "${BRANCH}" == "vendor" ]] || return 0 # only for BRANCH=vendor display_alert "Installing camera engine from APT repo" "camera-engine-rkaiq" "info" seeed_recomputer_install_from_apt camera-engine-rkaiq-rk3588 @@ -48,6 +63,7 @@ function pre_install_distribution_specific__recomputer_rk3588_install_camera_eng # Audio naming: HDMI0, HDMI1, HDMI-In, DP0, ES8311 function post_family_tweaks__recomputer_rk3588_naming_audios() { + [[ "${BRANCH}" == "vendor" ]] || return 0 # only for BRANCH=vendor display_alert "$BOARD" "Renaming recomputer rk3588 devkit audios" "info" mkdir -p "${SDCARD}"/etc/udev/rules.d/ diff --git a/patch/kernel/archive/rockchip64-7.1/dt/rk3588-recomputer-devkit.dts b/patch/kernel/archive/rockchip64-7.1/dt/rk3588-recomputer-devkit.dts new file mode 100644 index 000000000000..61b600eb926a --- /dev/null +++ b/patch/kernel/archive/rockchip64-7.1/dt/rk3588-recomputer-devkit.dts @@ -0,0 +1,1476 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Ricardo Pardini + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include +#include "rk3588.dtsi" + +/ { + model = "Seeed Studio reComputer RK3588 Dev Kit"; + compatible = "seeed,recomputer-rk3588-devkit", "rockchip,rk3588"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-vol-up { + label = "Volume Up"; + linux,code = ; + press-threshold-microvolt = <1750000>; + }; + }; + + aliases { + ethernet0 = &rtl_eth0; + ethernet1 = &rtl_eth1; + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + /* Switch between the ES8311 differential output and the jack. */ + hp_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_con>; + sound-name-prefix = "Headphone Amp"; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + es8311_sound: es8311-sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + simple-audio-card,name = "reComputer ES8311"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,aux-devs = <&hp_amp>; + simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; + simple-audio-card,widgets = "Headphone", "Headphones", + "Microphone", "Headset Mic"; + simple-audio-card,routing = "Headphones", "Headphone Amp OUTL", + "Headphones", "Headphone Amp OUTR", + "Headphone Amp INL", "OUT", + "Headphone Amp INR", "OUT", + "MIC1", "Headset Mic"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + + simple-audio-card,codec { + sound-dai = <&es8311>; + system-clock-frequency = <12288000>; + }; + }; + + hdmi0-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi0_con_in: endpoint { + remote-endpoint = <&hdmi0_out_con>; + }; + }; + }; + + hdmi1-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con_in: endpoint { + remote-endpoint = <&hdmi1_out_con>; + }; + }; + }; + + /* + * LED1 is a common-anode RGB LED tied to the ext_3v3 rail; each colour + * is switched by an NMOS driven from the SoC. + */ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&user_led_r>, <&user_led_g>, <&user_led_b>; + + led-red { + color = ; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + }; + + led-green { + color = ; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + led-blue { + color = ; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + fan: pwm-fan { + compatible = "pwm-fan"; + /* + * The fan idles at its ~1000 rpm floor and only ramps once + * the package gets warm; the levels above the first roughly + * track the measured rpm curve, so the steps are even. + */ + cooling-levels = <25 35 55 80 115 165 255>; + /* Sustains down to 8%, but needs 10% to break away. */ + fan-stop-to-start-percent = <15>; + fan-supply = <&vcc5v0_sys>; + interrupt-parent = <&gpio3>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&fan_tach>; + pulses-per-revolution = <2>; + pwms = <&pwm2 0 50000 0>; + #cooling-cells = <2>; + }; + + /* + * Always-on discrete 12 V to 3.3 V regulator; supplies the Ethernet + * controllers, the USB 3.x hub, the user LED and the expansion + * connectors. + */ + ext_3v3: regulator-ext-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "ext_3v3"; + vin-supply = <&vcc12v_dcin>; + }; + + /* Always-on discrete 12 V to 3.3 V regulator for the two M.2 slots. */ + pcie_3v3: regulator-pcie-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "pcie_3v3"; + vin-supply = <&vcc12v_dcin>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vcc_1v1_nldo_s3"; + vin-supply = <&vcc4v0_sys>; + }; + + /* Load switch off vcc_3v3_s3; supplies the eMMC, the SPI NOR and PMUIO2. */ + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s0"; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc12v_dcin: regulator-vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-name = "vcc12v_dcin"; + }; + + /* + * Supplies the PI6C557-05B buffer that fans the PCIe 3.0 reference + * clock out to the x4 M.2 slot. It has no consumer of its own, so + * keep it on. + */ + vcc3v3_pcie_clk: regulator-vcc3v3-pcie-clk { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie30_clk_en>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pcie_clk"; + vin-supply = <&vcc4v0_sys>; + }; + + vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwren>; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_sd_s0"; + vin-supply = <&vcc_3v3_s3>; + }; + + /* Feeds the RK806 and the three RK860x CPU/NPU regulators. */ + vcc4v0_sys: regulator-vcc4v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + regulator-name = "vcc4v0_sys"; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_sys"; + vin-supply = <&vcc12v_dcin>; + }; + + /* Type-C VBUS, switched by an SY6280AAC limited to 1.0 A. */ + vcc5v0_usb0: regulator-vcc5v0-usb0 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&typec5v_pwren>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_usb0"; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +/* DisplayPort alternate mode, out over the USB Type-C connector. */ +&dp0 { + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&usbdp_phy0_dp_in>; + }; +}; + +&gpio1 { + /* + * Radio disable of the mini PCIe slot, active low. Deassert it so a + * fitted card is allowed to transmit. + */ + minipcie-w-disable-hog { + gpio-hog; + gpios = ; + line-name = "minipcie_w_disable_n"; + output-high; + }; +}; + +&gpio3 { + /* + * The on-board VL822 USB 3.x hub has no DT consumer that could own + * these: it is not in the onboard_usb_dev device table. Hold its + * 1.05 V core rail enabled and hold it out of reset. + */ + usb-hub-power-hog { + gpio-hog; + gpios = ; + line-name = "usb_hub30_en"; + output-high; + }; + + usb-hub-reset-hog { + gpio-hog; + gpios = ; + line-name = "sys_3v3_en"; + output-high; + }; +}; + +&gpio4 { + /* + * PERST# of the mini PCIe slot, active low. The slot carries USB and + * I2C rather than PCIe, so nothing claims this line; hold it + * deasserted to let a fitted card run. + */ + minipcie-perst-hog { + gpio-hog; + gpios = ; + line-name = "minipcie_perst_n"; + output-high; + }; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + status = "okay"; +}; + +&hdmi0 { + frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + status = "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi0>; + }; +}; + +&hdmi0_out { + hdmi0_out_con: endpoint { + remote-endpoint = <&hdmi0_con_in>; + }; +}; + +&hdmi0_sound { + status = "okay"; +}; + +&hdmi1 { + frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + status = "okay"; +}; + +&hdmi1_in { + hdmi1_in_vp1: endpoint { + remote-endpoint = <&vp1_out_hdmi1>; + }; +}; + +&hdmi1_out { + hdmi1_out_con: endpoint { + remote-endpoint = <&hdmi1_con_in>; + }; +}; + +&hdmi1_sound { + status = "okay"; +}; + +/* HDMI input, on its own Type-A connector. */ +&hdmi_receiver { + hpd-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin + &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; + status = "okay"; +}; + +&hdmi_receiver_cma { + status = "okay"; +}; + +&hdptxphy0 { + status = "okay"; +}; + +&hdptxphy1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m2_xfer>; + status = "okay"; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +/* Exposed on the 40-pin header: pin 3 (SDA) and pin 5 (SCL). */ +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m1_xfer>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; + status = "okay"; + + eeprom@57 { + compatible = "atmel,24c256"; + reg = <0x57>; + pagesize = <16>; + vcc-supply = <&vcc_3v3_s0>; + }; +}; + +&i2c6 { + status = "okay"; + + /* + * Awinic AW35615, register-compatible with the FUSB302B. An HUSB311 + * at 0x4e is an alternate BOM option, not fitted by default. + */ + usbc0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_int>; + vbus-supply = <&vcc5v0_usb0>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; + op-sink-microwatt = <1000000>; + power-role = "dual"; + /* The VBUS switch on this port is limited to 1.0 A. */ + sink-pdos = ; + source-pdos = ; + try-power-role = "sink"; + + altmodes { + displayport { + svid = /bits/ 16 <0xff01>; + vdo = <0xffffffff>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_hs: endpoint { + remote-endpoint = <&usb_host0_xhci_hs>; + }; + }; + + port@1 { + reg = <1>; + usbc0_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_out>; + }; + }; + + port@2 { + reg = <2>; + usbc0_sbu: endpoint { + remote-endpoint = <&usbdp_phy0_dp_out>; + }; + }; + }; + }; + }; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "pcf8563"; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pcf8563_int>; + wakeup-source; + }; +}; + +&i2c7 { + status = "okay"; + + es8311: audio-codec@18 { + compatible = "everest,es8311"; + reg = <0x18>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + #sound-dai-cells = <0>; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; +}; + +&i2s5_8ch { + status = "okay"; +}; + +&i2s6_8ch { + status = "okay"; +}; + +&package_thermal { + polling-delay = <1000>; + + trips { + package_fan0: package-fan0 { + temperature = <50000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan1: package-fan1 { + temperature = <55000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan2: package-fan2 { + temperature = <60000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan3: package-fan3 { + temperature = <65000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan4: package-fan4 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan5: package-fan5 { + temperature = <75000>; + hysteresis = <2000>; + type = "active"; + }; + }; + + cooling-maps { + map-fan0 { + trip = <&package_fan0>; + cooling-device = <&fan 1 1>; + }; + + map-fan1 { + trip = <&package_fan1>; + cooling-device = <&fan 2 2>; + }; + + map-fan2 { + trip = <&package_fan2>; + cooling-device = <&fan 3 3>; + }; + + map-fan3 { + trip = <&package_fan3>; + cooling-device = <&fan 4 4>; + }; + + map-fan4 { + trip = <&package_fan4>; + cooling-device = <&fan 5 5>; + }; + + map-fan5 { + trip = <&package_fan5>; + cooling-device = <&fan 6 6>; + }; + }; +}; + +/* Realtek RTL8125B, right Ethernet port, marked ETH1 on the enclosure. */ +&pcie2x1l0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_1_rst>; + reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&ext_3v3>; + status = "okay"; + + pcie@0,0 { + reg = <0x200000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + device_type = "pci"; + bus-range = <0x21 0x2f>; + + rtl_eth1: ethernet@0,0 { + compatible = "pci10ec,8125"; + reg = <0x210000 0 0 0 0>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; +}; + +/* M.2 M-key slot, PCIe 2.0 x1. */ +&pcie2x1l1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_rst>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie_3v3>; + status = "okay"; +}; + +/* + * Realtek RTL8125B, left Ethernet port, marked ETH0 on the enclosure. The + * reset line is called PCIE20_1_2_WAKEn_M1_L on the schematic, but it is + * wired to the controller's PERSTB pin. + */ +&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_0_rst>; + reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&ext_3v3>; + status = "okay"; + + pcie@0,0 { + reg = <0x400000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + device_type = "pci"; + bus-range = <0x41 0x4f>; + + rtl_eth0: ethernet@0,0 { + compatible = "pci10ec,8125"; + reg = <0x410000 0 0 0 0>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; +}; + +&pcie30phy { + status = "okay"; +}; + +/* M.2 M-key slot, PCIe 3.0 x4. */ +&pcie3x4 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie3_rst>; + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie_3v3>; + status = "okay"; +}; + +&pinctrl { + fan { + /* Pull down so the fan is off while the PWM is disabled. */ + fan_pwm: fan-pwm { + rockchip,pins = <4 RK_PC2 11 &pcfg_pull_down_drv_level_2>; + }; + + fan_tach: fan-tach { + rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmirx { + hdmirx_hpd: hdmirx-5v-detection { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + headphone { + hp_con: hp-con { + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hp_det: hp-det { + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + user_led_b: user-led-b { + rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led_g: user-led-g { + rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led_r: user-led-r { + rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcf8563 { + pcf8563_int: pcf8563-int { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie2_0_rst: pcie2-0-rst { + rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_1_rst: pcie2-1-rst { + rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_2_rst: pcie2-2-rst { + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie30_clk_en: pcie30-clk-en { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie3_rst: pcie3-rst { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc { + sdmmc_pwren: sdmmc-pwren { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + typec5v_pwren: typec5v-pwren { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_int: usbc0-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + usbc0_sbu1: usbc0-sbu1 { + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_sbu2: usbc0-sbu2 { + rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&fan_pwm>; + status = "okay"; +}; + +&rknn_core_0 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_core_1 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_core_2 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_mmu_0 { + status = "okay"; +}; + +&rknn_mmu_1 { + status = "okay"; +}; + +&rknn_mmu_2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd_s0>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim2_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + vcc-supply = <&vcc_3v3_s0>; + }; +}; + +/* + * Exposed on the 40-pin header: pins 19 (MOSI), 21 (MISO), 23 (SCLK) and + * 24 (CE0). The same pins reach the mini PCIe slot's PCM lines, which a + * LoRa concentrator drives as an SPI bus, so leave the controller + * disabled and let an overlay enable it for whichever is in use. + */ +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1m0_pins &spi1m0_cs0>; + status = "disabled"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + #gpio-cells = <2>; + gpio-controller; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency = <1000000>; + system-power-controller; + vcc1-supply = <&vcc4v0_sys>; + vcc2-supply = <&vcc4v0_sys>; + vcc3-supply = <&vcc4v0_sys>; + vcc4-supply = <&vcc4v0_sys>; + vcc5-supply = <&vcc4v0_sys>; + vcc6-supply = <&vcc4v0_sys>; + vcc7-supply = <&vcc4v0_sys>; + vcc8-supply = <&vcc4v0_sys>; + vcc9-supply = <&vcc4v0_sys>; + vcc10-supply = <&vcc4v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc4v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc4v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <800000>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-name = "vcc_2v0_pldo_s3"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* + * PLDO4 is the analog 3.3 V rail (vcca_3v3_s0 on the + * schematic); the board's digital vcc_3v3_s0 is a + * separate load switch off vcc_3v3_s3. + */ + avcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc_3v3_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + /* Supplies the HDMI/eDP transmitters (837.5 mV). */ + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <837500>; + regulator-max-microvolt = <837500>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <837500>; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&u2phy1 { + status = "okay"; +}; + +/* USB 2.0 half of the link to the on-board USB 3.x hub. */ +&u2phy1_otg { + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +/* Exposed on the 40-pin header: pin 33 (TX) and pin 35 (RX). */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4m0_xfer>; + status = "okay"; +}; + +/* The USB Type-C port. */ +&usb_host0_xhci { + usb-role-switch; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb_host0_xhci_hs: endpoint { + remote-endpoint = <&usbc0_hs>; + }; + }; + + port@1 { + reg = <1>; + usb_host0_xhci_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_in>; + }; + }; + }; +}; + +/* USB 2.0 host port, routed to the mini PCIe slot. */ +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +/* + * Upstream port of the on-board VL822 hub, which fans out to the four + * USB 3.0 Type-A connectors. + */ +&usb_host1_xhci { + dr_mode = "host"; + status = "okay"; +}; + +/* SuperSpeed and DisplayPort halves of the USB Type-C port. */ +&usbdp_phy0 { + mode-switch; + orientation-switch; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_sbu1>, <&usbc0_sbu2>; + sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + usbdp_phy0_ss_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_ss>; + }; + + usbdp_phy0_ss_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&usb_host0_xhci_ss>; + }; + + usbdp_phy0_dp_in: endpoint@2 { + reg = <2>; + remote-endpoint = <&dp0_out_con>; + }; + + usbdp_phy0_dp_out: endpoint@3 { + reg = <3>; + remote-endpoint = <&usbc0_sbu>; + }; + }; +}; + +/* SuperSpeed half of the link to the on-board USB 3.x hub. */ +&usbdp_phy1 { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi0_in_vp0>; + }; +}; + +&vp1 { + vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { + reg = ; + remote-endpoint = <&hdmi1_in_vp1>; + }; +}; + +&vp2 { + vp2_out_dp0: endpoint@a { + reg = ; + remote-endpoint = <&dp0_in_vp2>; + }; +}; diff --git a/patch/kernel/archive/rockchip64-7.2/dt/rk3588-recomputer-devkit.dts b/patch/kernel/archive/rockchip64-7.2/dt/rk3588-recomputer-devkit.dts new file mode 100644 index 000000000000..61b600eb926a --- /dev/null +++ b/patch/kernel/archive/rockchip64-7.2/dt/rk3588-recomputer-devkit.dts @@ -0,0 +1,1476 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Ricardo Pardini + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include +#include "rk3588.dtsi" + +/ { + model = "Seeed Studio reComputer RK3588 Dev Kit"; + compatible = "seeed,recomputer-rk3588-devkit", "rockchip,rk3588"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-vol-up { + label = "Volume Up"; + linux,code = ; + press-threshold-microvolt = <1750000>; + }; + }; + + aliases { + ethernet0 = &rtl_eth0; + ethernet1 = &rtl_eth1; + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + /* Switch between the ES8311 differential output and the jack. */ + hp_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_con>; + sound-name-prefix = "Headphone Amp"; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + es8311_sound: es8311-sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + simple-audio-card,name = "reComputer ES8311"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,aux-devs = <&hp_amp>; + simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; + simple-audio-card,widgets = "Headphone", "Headphones", + "Microphone", "Headset Mic"; + simple-audio-card,routing = "Headphones", "Headphone Amp OUTL", + "Headphones", "Headphone Amp OUTR", + "Headphone Amp INL", "OUT", + "Headphone Amp INR", "OUT", + "MIC1", "Headset Mic"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + + simple-audio-card,codec { + sound-dai = <&es8311>; + system-clock-frequency = <12288000>; + }; + }; + + hdmi0-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi0_con_in: endpoint { + remote-endpoint = <&hdmi0_out_con>; + }; + }; + }; + + hdmi1-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con_in: endpoint { + remote-endpoint = <&hdmi1_out_con>; + }; + }; + }; + + /* + * LED1 is a common-anode RGB LED tied to the ext_3v3 rail; each colour + * is switched by an NMOS driven from the SoC. + */ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&user_led_r>, <&user_led_g>, <&user_led_b>; + + led-red { + color = ; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + }; + + led-green { + color = ; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + led-blue { + color = ; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + fan: pwm-fan { + compatible = "pwm-fan"; + /* + * The fan idles at its ~1000 rpm floor and only ramps once + * the package gets warm; the levels above the first roughly + * track the measured rpm curve, so the steps are even. + */ + cooling-levels = <25 35 55 80 115 165 255>; + /* Sustains down to 8%, but needs 10% to break away. */ + fan-stop-to-start-percent = <15>; + fan-supply = <&vcc5v0_sys>; + interrupt-parent = <&gpio3>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&fan_tach>; + pulses-per-revolution = <2>; + pwms = <&pwm2 0 50000 0>; + #cooling-cells = <2>; + }; + + /* + * Always-on discrete 12 V to 3.3 V regulator; supplies the Ethernet + * controllers, the USB 3.x hub, the user LED and the expansion + * connectors. + */ + ext_3v3: regulator-ext-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "ext_3v3"; + vin-supply = <&vcc12v_dcin>; + }; + + /* Always-on discrete 12 V to 3.3 V regulator for the two M.2 slots. */ + pcie_3v3: regulator-pcie-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "pcie_3v3"; + vin-supply = <&vcc12v_dcin>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vcc_1v1_nldo_s3"; + vin-supply = <&vcc4v0_sys>; + }; + + /* Load switch off vcc_3v3_s3; supplies the eMMC, the SPI NOR and PMUIO2. */ + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s0"; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc12v_dcin: regulator-vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-name = "vcc12v_dcin"; + }; + + /* + * Supplies the PI6C557-05B buffer that fans the PCIe 3.0 reference + * clock out to the x4 M.2 slot. It has no consumer of its own, so + * keep it on. + */ + vcc3v3_pcie_clk: regulator-vcc3v3-pcie-clk { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie30_clk_en>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pcie_clk"; + vin-supply = <&vcc4v0_sys>; + }; + + vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwren>; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_sd_s0"; + vin-supply = <&vcc_3v3_s3>; + }; + + /* Feeds the RK806 and the three RK860x CPU/NPU regulators. */ + vcc4v0_sys: regulator-vcc4v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + regulator-name = "vcc4v0_sys"; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_sys"; + vin-supply = <&vcc12v_dcin>; + }; + + /* Type-C VBUS, switched by an SY6280AAC limited to 1.0 A. */ + vcc5v0_usb0: regulator-vcc5v0-usb0 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&typec5v_pwren>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_usb0"; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +/* DisplayPort alternate mode, out over the USB Type-C connector. */ +&dp0 { + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&usbdp_phy0_dp_in>; + }; +}; + +&gpio1 { + /* + * Radio disable of the mini PCIe slot, active low. Deassert it so a + * fitted card is allowed to transmit. + */ + minipcie-w-disable-hog { + gpio-hog; + gpios = ; + line-name = "minipcie_w_disable_n"; + output-high; + }; +}; + +&gpio3 { + /* + * The on-board VL822 USB 3.x hub has no DT consumer that could own + * these: it is not in the onboard_usb_dev device table. Hold its + * 1.05 V core rail enabled and hold it out of reset. + */ + usb-hub-power-hog { + gpio-hog; + gpios = ; + line-name = "usb_hub30_en"; + output-high; + }; + + usb-hub-reset-hog { + gpio-hog; + gpios = ; + line-name = "sys_3v3_en"; + output-high; + }; +}; + +&gpio4 { + /* + * PERST# of the mini PCIe slot, active low. The slot carries USB and + * I2C rather than PCIe, so nothing claims this line; hold it + * deasserted to let a fitted card run. + */ + minipcie-perst-hog { + gpio-hog; + gpios = ; + line-name = "minipcie_perst_n"; + output-high; + }; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + status = "okay"; +}; + +&hdmi0 { + frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + status = "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi0>; + }; +}; + +&hdmi0_out { + hdmi0_out_con: endpoint { + remote-endpoint = <&hdmi0_con_in>; + }; +}; + +&hdmi0_sound { + status = "okay"; +}; + +&hdmi1 { + frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + status = "okay"; +}; + +&hdmi1_in { + hdmi1_in_vp1: endpoint { + remote-endpoint = <&vp1_out_hdmi1>; + }; +}; + +&hdmi1_out { + hdmi1_out_con: endpoint { + remote-endpoint = <&hdmi1_con_in>; + }; +}; + +&hdmi1_sound { + status = "okay"; +}; + +/* HDMI input, on its own Type-A connector. */ +&hdmi_receiver { + hpd-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin + &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; + status = "okay"; +}; + +&hdmi_receiver_cma { + status = "okay"; +}; + +&hdptxphy0 { + status = "okay"; +}; + +&hdptxphy1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m2_xfer>; + status = "okay"; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +/* Exposed on the 40-pin header: pin 3 (SDA) and pin 5 (SCL). */ +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m1_xfer>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; + status = "okay"; + + eeprom@57 { + compatible = "atmel,24c256"; + reg = <0x57>; + pagesize = <16>; + vcc-supply = <&vcc_3v3_s0>; + }; +}; + +&i2c6 { + status = "okay"; + + /* + * Awinic AW35615, register-compatible with the FUSB302B. An HUSB311 + * at 0x4e is an alternate BOM option, not fitted by default. + */ + usbc0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_int>; + vbus-supply = <&vcc5v0_usb0>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; + op-sink-microwatt = <1000000>; + power-role = "dual"; + /* The VBUS switch on this port is limited to 1.0 A. */ + sink-pdos = ; + source-pdos = ; + try-power-role = "sink"; + + altmodes { + displayport { + svid = /bits/ 16 <0xff01>; + vdo = <0xffffffff>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_hs: endpoint { + remote-endpoint = <&usb_host0_xhci_hs>; + }; + }; + + port@1 { + reg = <1>; + usbc0_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_out>; + }; + }; + + port@2 { + reg = <2>; + usbc0_sbu: endpoint { + remote-endpoint = <&usbdp_phy0_dp_out>; + }; + }; + }; + }; + }; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "pcf8563"; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pcf8563_int>; + wakeup-source; + }; +}; + +&i2c7 { + status = "okay"; + + es8311: audio-codec@18 { + compatible = "everest,es8311"; + reg = <0x18>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + #sound-dai-cells = <0>; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; +}; + +&i2s5_8ch { + status = "okay"; +}; + +&i2s6_8ch { + status = "okay"; +}; + +&package_thermal { + polling-delay = <1000>; + + trips { + package_fan0: package-fan0 { + temperature = <50000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan1: package-fan1 { + temperature = <55000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan2: package-fan2 { + temperature = <60000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan3: package-fan3 { + temperature = <65000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan4: package-fan4 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan5: package-fan5 { + temperature = <75000>; + hysteresis = <2000>; + type = "active"; + }; + }; + + cooling-maps { + map-fan0 { + trip = <&package_fan0>; + cooling-device = <&fan 1 1>; + }; + + map-fan1 { + trip = <&package_fan1>; + cooling-device = <&fan 2 2>; + }; + + map-fan2 { + trip = <&package_fan2>; + cooling-device = <&fan 3 3>; + }; + + map-fan3 { + trip = <&package_fan3>; + cooling-device = <&fan 4 4>; + }; + + map-fan4 { + trip = <&package_fan4>; + cooling-device = <&fan 5 5>; + }; + + map-fan5 { + trip = <&package_fan5>; + cooling-device = <&fan 6 6>; + }; + }; +}; + +/* Realtek RTL8125B, right Ethernet port, marked ETH1 on the enclosure. */ +&pcie2x1l0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_1_rst>; + reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&ext_3v3>; + status = "okay"; + + pcie@0,0 { + reg = <0x200000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + device_type = "pci"; + bus-range = <0x21 0x2f>; + + rtl_eth1: ethernet@0,0 { + compatible = "pci10ec,8125"; + reg = <0x210000 0 0 0 0>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; +}; + +/* M.2 M-key slot, PCIe 2.0 x1. */ +&pcie2x1l1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_rst>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie_3v3>; + status = "okay"; +}; + +/* + * Realtek RTL8125B, left Ethernet port, marked ETH0 on the enclosure. The + * reset line is called PCIE20_1_2_WAKEn_M1_L on the schematic, but it is + * wired to the controller's PERSTB pin. + */ +&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_0_rst>; + reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&ext_3v3>; + status = "okay"; + + pcie@0,0 { + reg = <0x400000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + device_type = "pci"; + bus-range = <0x41 0x4f>; + + rtl_eth0: ethernet@0,0 { + compatible = "pci10ec,8125"; + reg = <0x410000 0 0 0 0>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; +}; + +&pcie30phy { + status = "okay"; +}; + +/* M.2 M-key slot, PCIe 3.0 x4. */ +&pcie3x4 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie3_rst>; + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie_3v3>; + status = "okay"; +}; + +&pinctrl { + fan { + /* Pull down so the fan is off while the PWM is disabled. */ + fan_pwm: fan-pwm { + rockchip,pins = <4 RK_PC2 11 &pcfg_pull_down_drv_level_2>; + }; + + fan_tach: fan-tach { + rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmirx { + hdmirx_hpd: hdmirx-5v-detection { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + headphone { + hp_con: hp-con { + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hp_det: hp-det { + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + user_led_b: user-led-b { + rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led_g: user-led-g { + rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led_r: user-led-r { + rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcf8563 { + pcf8563_int: pcf8563-int { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie2_0_rst: pcie2-0-rst { + rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_1_rst: pcie2-1-rst { + rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_2_rst: pcie2-2-rst { + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie30_clk_en: pcie30-clk-en { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie3_rst: pcie3-rst { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc { + sdmmc_pwren: sdmmc-pwren { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + typec5v_pwren: typec5v-pwren { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_int: usbc0-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + usbc0_sbu1: usbc0-sbu1 { + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_sbu2: usbc0-sbu2 { + rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&fan_pwm>; + status = "okay"; +}; + +&rknn_core_0 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_core_1 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_core_2 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_mmu_0 { + status = "okay"; +}; + +&rknn_mmu_1 { + status = "okay"; +}; + +&rknn_mmu_2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd_s0>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim2_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + vcc-supply = <&vcc_3v3_s0>; + }; +}; + +/* + * Exposed on the 40-pin header: pins 19 (MOSI), 21 (MISO), 23 (SCLK) and + * 24 (CE0). The same pins reach the mini PCIe slot's PCM lines, which a + * LoRa concentrator drives as an SPI bus, so leave the controller + * disabled and let an overlay enable it for whichever is in use. + */ +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1m0_pins &spi1m0_cs0>; + status = "disabled"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + #gpio-cells = <2>; + gpio-controller; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency = <1000000>; + system-power-controller; + vcc1-supply = <&vcc4v0_sys>; + vcc2-supply = <&vcc4v0_sys>; + vcc3-supply = <&vcc4v0_sys>; + vcc4-supply = <&vcc4v0_sys>; + vcc5-supply = <&vcc4v0_sys>; + vcc6-supply = <&vcc4v0_sys>; + vcc7-supply = <&vcc4v0_sys>; + vcc8-supply = <&vcc4v0_sys>; + vcc9-supply = <&vcc4v0_sys>; + vcc10-supply = <&vcc4v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc4v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc4v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <800000>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-name = "vcc_2v0_pldo_s3"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* + * PLDO4 is the analog 3.3 V rail (vcca_3v3_s0 on the + * schematic); the board's digital vcc_3v3_s0 is a + * separate load switch off vcc_3v3_s3. + */ + avcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc_3v3_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + /* Supplies the HDMI/eDP transmitters (837.5 mV). */ + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <837500>; + regulator-max-microvolt = <837500>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <837500>; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&u2phy1 { + status = "okay"; +}; + +/* USB 2.0 half of the link to the on-board USB 3.x hub. */ +&u2phy1_otg { + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +/* Exposed on the 40-pin header: pin 33 (TX) and pin 35 (RX). */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4m0_xfer>; + status = "okay"; +}; + +/* The USB Type-C port. */ +&usb_host0_xhci { + usb-role-switch; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb_host0_xhci_hs: endpoint { + remote-endpoint = <&usbc0_hs>; + }; + }; + + port@1 { + reg = <1>; + usb_host0_xhci_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_in>; + }; + }; + }; +}; + +/* USB 2.0 host port, routed to the mini PCIe slot. */ +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +/* + * Upstream port of the on-board VL822 hub, which fans out to the four + * USB 3.0 Type-A connectors. + */ +&usb_host1_xhci { + dr_mode = "host"; + status = "okay"; +}; + +/* SuperSpeed and DisplayPort halves of the USB Type-C port. */ +&usbdp_phy0 { + mode-switch; + orientation-switch; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_sbu1>, <&usbc0_sbu2>; + sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + usbdp_phy0_ss_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_ss>; + }; + + usbdp_phy0_ss_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&usb_host0_xhci_ss>; + }; + + usbdp_phy0_dp_in: endpoint@2 { + reg = <2>; + remote-endpoint = <&dp0_out_con>; + }; + + usbdp_phy0_dp_out: endpoint@3 { + reg = <3>; + remote-endpoint = <&usbc0_sbu>; + }; + }; +}; + +/* SuperSpeed half of the link to the on-board USB 3.x hub. */ +&usbdp_phy1 { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi0_in_vp0>; + }; +}; + +&vp1 { + vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { + reg = ; + remote-endpoint = <&hdmi1_in_vp1>; + }; +}; + +&vp2 { + vp2_out_dp0: endpoint@a { + reg = ; + remote-endpoint = <&dp0_in_vp2>; + }; +}; From ec9a727f53f561b23057468e4e9f40319323d07c Mon Sep 17 00:00:00 2001 From: Ricardo Pardini Date: Wed, 5 Aug 2026 11:46:19 +0200 Subject: [PATCH 2/2] recomputer-rk3588-devkit: edge: u-boot: full mainline u-boot with DT/defconfig +fancy - `.dts` is copy from rockchip64-7.1 - `recomputer-rk3588_defconfig` is similar to other rk3588 boards, except: - enable all/most SPI Flash drivers - enable FUSB302 driver - `-u-boot.dtsi` just pulls in the generic dtsi + sfc/flash0 bootph - stores environment in SPI at offset 0xc00000 size 0x20000 - fw_printenv/fw_setenv userspace vs SPI environment - preboot flashes R/G/B LED (tri-color user LED) - use mainline AT-F for mainline builds (so HDMI-RX works with mainline kernel) - keep rkbin blob for vendor builds (although vendor is using rk u-boot for now) --- config/boards/recomputer-rk3588-devkit.conf | 132 ++ .../defconfig/recomputer-rk3588_defconfig | 144 ++ .../rk3588-recomputer-devkit-u-boot.dtsi | 37 + .../rk3588-recomputer-devkit.dts | 1476 +++++++++++++++++ 4 files changed, 1789 insertions(+) create mode 100644 patch/u-boot/v2026.07/defconfig/recomputer-rk3588_defconfig create mode 100644 patch/u-boot/v2026.07/dt_uboot/rk3588-recomputer-devkit-u-boot.dtsi create mode 100644 patch/u-boot/v2026.07/dt_upstream_rockchip/rk3588-recomputer-devkit.dts diff --git a/config/boards/recomputer-rk3588-devkit.conf b/config/boards/recomputer-rk3588-devkit.conf index 35c264917476..6e6a287c4e71 100644 --- a/config/boards/recomputer-rk3588-devkit.conf +++ b/config/boards/recomputer-rk3588-devkit.conf @@ -33,6 +33,8 @@ case "${BRANCH}" in # mainline DTB name is different display_alert "$BOARD" "Using mainline kernel DTB: rockchip/rk3588-recomputer-devkit.dtb -> boot_fdt_file" "warn" declare -g BOOT_FDT_FILE="rockchip/rk3588-recomputer-devkit.dtb" + # userspace for manipulating the u-boot env stored in SPI flash + PACKAGE_LIST_BOARD="libubootenv-tool" # libubootenv-tool provides fw_printenv and fw_setenv, for talking to U-Boot environment ;; esac @@ -73,3 +75,133 @@ function post_family_tweaks__recomputer_rk3588_naming_audios() { echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-dp0-sound", ENV{SOUND_DESCRIPTION}="DP0 Audio"' >> "${SDCARD}"/etc/udev/rules.d/90-naming-audios.rules echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-es8311-sound", ENV{SOUND_DESCRIPTION}="ES8311 Audio"' >> "${SDCARD}"/etc/udev/rules.d/90-naming-audios.rules } + +#### mainline u-boot for edge/current <==------------------------------------------------------------------------------- + +# Mainline U-Boot +function post_family_config__recomputer_rk3588_devkit_use_mainline_uboot() { + [[ "${BRANCH}" == "vendor" ]] && return 0 # only for BRANCH=current/edge, not vendor + + display_alert "$BOARD" "Using mainline U-Boot for $BOARD / $BRANCH" "info" + + # If BRANCH==vendor, use rkbin BL31 ${RKBIN_DIR}/${BL31_BLOB}, otherwise, bl31.elf from mainline ATF/TF-A + declare bl31_blob="undetermined" + if [[ "${BRANCH}" == "vendor" ]]; then + display_alert "${BOARD}/${BRANCH}" "Using Rockchip rkbin BL31 blob : ${RKBIN_DIR}/${BL31_BLOB}" "info" + bl31_blob="${RKBIN_DIR}/${BL31_BLOB}" + declare -g ATF_COMPILE="no" # no need to build mainline it either + else + display_alert "${BOARD}/${BRANCH}" "Using mainline BL31: bl31.elf from mainline ATF/TF-A" "info" + bl31_blob="bl31.elf" + # To reuse ATF code in rockchip64_common, let's change the BOOT_SCENARIO and call prepare_boot_configuration() again + BOOT_SCENARIO="tpl-blob-atf-mainline" + prepare_boot_configuration + fi + + declare -g BOOTCONFIG="recomputer-rk3588_defconfig" + declare -g BOOTDELAY=1 + declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git" + declare -g BOOTBRANCH="tag:v2026.07" + declare -g BOOTPATCHDIR="v2026.07" + + # Binman produces both eMMC/SD and SPI images + declare -g UBOOT_TARGET_MAP="BL31=${bl31_blob} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin u-boot-rockchip-spi.bin" + + # Disable vendor-specific postprocessing; binman does all the work + unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd + + # Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go + function write_uboot_platform() { + dd "if=$1/u-boot-rockchip.bin" "of=$2" bs=32k seek=1 conv=notrunc status=none + } + + function write_uboot_platform_mtd() { + flashcp -v -p "$1/u-boot-rockchip-spi.bin" /dev/mtd0 + } +} + +# fancy-up the mainline U-Boot +function post_config_uboot_target__recomputer_rk3588_devkit_enable_ufs_and_spi_env() { + [[ "${BRANCH}" == "vendor" ]] && return 0 # only for BRANCH=current/edge, not vendor + + display_alert "mainline u-boot" "Extra mainline u-boot configs for ${BOARD}/${BRANCH}" "info" + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: environment in SPI flash" "info" + run_host_command_logged scripts/config --set-val CONFIG_ENV_IS_NOWHERE "n" + run_host_command_logged scripts/config --set-val CONFIG_ENV_IS_IN_SPI_FLASH "y" + run_host_command_logged scripts/config --set-val CONFIG_ENV_SECT_SIZE_AUTO "y" + run_host_command_logged scripts/config --set-val CONFIG_ENV_OVERWRITE "y" + run_host_command_logged scripts/config --set-val CONFIG_ENV_SIZE "0x20000" + run_host_command_logged scripts/config --set-val CONFIG_ENV_OFFSET "0xc00000" + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable preboot & flash user LED in preboot" "info" + run_host_command_logged scripts/config --enable CONFIG_USE_PREBOOT + run_host_command_logged scripts/config --set-str CONFIG_PREBOOT "'led red:indicator on; sleep 0.1; led red:indicator off; led blue:heartbeat on; sleep 0.1; led blue:heartbeat off; led green:indicator on; sleep 0.1; led green:indicator off;'" # double quotes required due to run_host_command_logged's quirks + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable EFI debugging commands" "info" + run_host_command_logged scripts/config --enable CMD_EFIDEBUG + run_host_command_logged scripts/config --enable CMD_NVEDIT_EFI + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable more filesystems support" "info" + run_host_command_logged scripts/config --enable CONFIG_CMD_BTRFS + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable more compression support" "info" + run_host_command_logged scripts/config --enable CONFIG_LZO + run_host_command_logged scripts/config --enable CONFIG_BZIP2 + run_host_command_logged scripts/config --enable CONFIG_ZSTD + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable gpio LED support" "info" + run_host_command_logged scripts/config --enable CONFIG_LED + run_host_command_logged scripts/config --enable CONFIG_LED_GPIO + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable networking cmds" "info" + run_host_command_logged scripts/config --enable CONFIG_CMD_NFS + run_host_command_logged scripts/config --enable CONFIG_CMD_WGET + run_host_command_logged scripts/config --enable CONFIG_CMD_DNS + run_host_command_logged scripts/config --enable CONFIG_PROT_TCP + run_host_command_logged scripts/config --enable CONFIG_PROT_TCP_SACK + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable LWIP (new networking stack)" "info" + run_host_command_logged scripts/config --enable CONFIG_CMD_MII + run_host_command_logged scripts/config --enable CONFIG_NET_LWIP + + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable MBed TLS stuff" "info" + run_host_command_logged scripts/config --enable CONFIG_WGET_HTTPS + run_host_command_logged scripts/config --enable CONFIG_WGET_CACERT + #run_host_command_logged scripts/config --enable CONFIG_WGET_BUILTIN_CACERT # not yet + run_host_command_logged scripts/config --enable CONFIG_MBEDTLS_LIB + + # UMS, RockUSB, gadget stuff + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: enable UMS/RockUSB gadget" "info" + declare -a enable_configs=("CONFIG_CMD_USB_MASS_STORAGE" "CONFIG_USB_GADGET" "USB_GADGET_DOWNLOAD" "CONFIG_USB_FUNCTION_ROCKUSB" "CONFIG_USB_FUNCTION_ACM" "CONFIG_CMD_ROCKUSB") + for config in "${enable_configs[@]}"; do + run_host_command_logged scripts/config --enable "${config}" + done + # Auto-enabled by the above, force off... + run_host_command_logged scripts/config --disable USB_FUNCTION_FASTBOOT + + return 0 +} + +# "rockchip-common: boot SD card first, then NVMe, then USB, then NET" +# On reComputer_rk3588, mmc1 is SD card, mmc0 is not present +function pre_config_uboot_target__recomputer_rk3588_devkit_boot_order() { + [[ "${BRANCH}" == "vendor" ]] && return 0 # only for BRANCH=current/edge, not vendor + + declare -a rockchip_uboot_targets=("mmc1" "nvme" "usb" "pxe" "dhcp") + display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: adjust boot order to '${rockchip_uboot_targets[*]}'" "info" + sed -i -e "s/#define BOOT_TARGETS.*/#define BOOT_TARGETS \"${rockchip_uboot_targets[*]}\"/" include/configs/rockchip-common.h + regular_git diff -u include/configs/rockchip-common.h || true +} + +# Include fw_setenv, configured to point to the correct spot on the SPI Flash +function post_family_tweaks__config_recomputer_rk3588_fwenv() { + [[ "${BRANCH}" == "vendor" ]] && return 0 # Not for 'vendor' branch, which uses 2017.09 vendor u-boot from Radxa + display_alert "Configuring fw_printenv and fw_setenv" "for ${BOARD} and u-boot ${BOOTBRANCH}" "info" + # Addresses below come from CONFIG_ENV_OFFSET and CONFIG_ENV_SIZE in defconfig + cat <<- 'FW_ENV_CONFIG' > "${SDCARD}"/etc/fw_env.config + # MTD/SPI u-boot env for the ${BOARD_NAME} + # MTD device name Device offset Env. size Flash sector size Number of sectors + /dev/mtd0 0xc00000 0x20000 + FW_ENV_CONFIG +} diff --git a/patch/u-boot/v2026.07/defconfig/recomputer-rk3588_defconfig b/patch/u-boot/v2026.07/defconfig/recomputer-rk3588_defconfig new file mode 100644 index 000000000000..ced39cd83b5f --- /dev/null +++ b/patch/u-boot/v2026.07/defconfig/recomputer-rk3588_defconfig @@ -0,0 +1,144 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-recomputer-devkit" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_ROCKCHIP_SPI_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_ROCK5B_RK3588=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_SF_DEFAULT_BUS=5 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-recomputer-devkit.dtb" +# CONFIG_SYS_DEVICE_NULLDEV is not set +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_TCPM=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DNS=y +CONFIG_CMD_NFS=y +CONFIG_CMD_WGET=y +CONFIG_WGET_HTTPS=y +CONFIG_WGET_CACERT=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_BTRFS=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_RELOC_GD_ENV_ADDR=y +CONFIG_NET_LWIP=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_SYSCON=y +CONFIG_AHCI=y +CONFIG_AHCI_PCI=y +CONFIG_DWC_AHCI=y +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DOSILICON=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_PUYA=y +CONFIG_SPI_FLASH_SILICONKAISER=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_SPI_FLASH_ZBIT=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_RTL8169=y +CONFIG_PHYLIB=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_FUSB302=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_LAN75XX=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_USB_FUNCTION_ACM=y +CONFIG_MBEDTLS_LIB=y +CONFIG_BZIP2=y +CONFIG_ERRNO_STR=y diff --git a/patch/u-boot/v2026.07/dt_uboot/rk3588-recomputer-devkit-u-boot.dtsi b/patch/u-boot/v2026.07/dt_uboot/rk3588-recomputer-devkit-u-boot.dtsi new file mode 100644 index 000000000000..e641b7ded9d3 --- /dev/null +++ b/patch/u-boot/v2026.07/dt_uboot/rk3588-recomputer-devkit-u-boot.dtsi @@ -0,0 +1,37 @@ +#include "rk3588-u-boot.dtsi" + +/* Make the non-power USB port work with gadget/UMS */ +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + phys = <&u2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +/* For working SPI-flash */ +&fspim2_pins { + bootph-pre-ram; + bootph-some-ram; +}; + +/* So the Recovery button can work */ +&saradc { + bootph-pre-ram; + /* vdd-microvolts = <1800000>; */ +}; + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; diff --git a/patch/u-boot/v2026.07/dt_upstream_rockchip/rk3588-recomputer-devkit.dts b/patch/u-boot/v2026.07/dt_upstream_rockchip/rk3588-recomputer-devkit.dts new file mode 100644 index 000000000000..61b600eb926a --- /dev/null +++ b/patch/u-boot/v2026.07/dt_upstream_rockchip/rk3588-recomputer-devkit.dts @@ -0,0 +1,1476 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Ricardo Pardini + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include +#include "rk3588.dtsi" + +/ { + model = "Seeed Studio reComputer RK3588 Dev Kit"; + compatible = "seeed,recomputer-rk3588-devkit", "rockchip,rk3588"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-vol-up { + label = "Volume Up"; + linux,code = ; + press-threshold-microvolt = <1750000>; + }; + }; + + aliases { + ethernet0 = &rtl_eth0; + ethernet1 = &rtl_eth1; + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + /* Switch between the ES8311 differential output and the jack. */ + hp_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_con>; + sound-name-prefix = "Headphone Amp"; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + es8311_sound: es8311-sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + simple-audio-card,name = "reComputer ES8311"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,aux-devs = <&hp_amp>; + simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; + simple-audio-card,widgets = "Headphone", "Headphones", + "Microphone", "Headset Mic"; + simple-audio-card,routing = "Headphones", "Headphone Amp OUTL", + "Headphones", "Headphone Amp OUTR", + "Headphone Amp INL", "OUT", + "Headphone Amp INR", "OUT", + "MIC1", "Headset Mic"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + + simple-audio-card,codec { + sound-dai = <&es8311>; + system-clock-frequency = <12288000>; + }; + }; + + hdmi0-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi0_con_in: endpoint { + remote-endpoint = <&hdmi0_out_con>; + }; + }; + }; + + hdmi1-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con_in: endpoint { + remote-endpoint = <&hdmi1_out_con>; + }; + }; + }; + + /* + * LED1 is a common-anode RGB LED tied to the ext_3v3 rail; each colour + * is switched by an NMOS driven from the SoC. + */ + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&user_led_r>, <&user_led_g>, <&user_led_b>; + + led-red { + color = ; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + }; + + led-green { + color = ; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + led-blue { + color = ; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + fan: pwm-fan { + compatible = "pwm-fan"; + /* + * The fan idles at its ~1000 rpm floor and only ramps once + * the package gets warm; the levels above the first roughly + * track the measured rpm curve, so the steps are even. + */ + cooling-levels = <25 35 55 80 115 165 255>; + /* Sustains down to 8%, but needs 10% to break away. */ + fan-stop-to-start-percent = <15>; + fan-supply = <&vcc5v0_sys>; + interrupt-parent = <&gpio3>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&fan_tach>; + pulses-per-revolution = <2>; + pwms = <&pwm2 0 50000 0>; + #cooling-cells = <2>; + }; + + /* + * Always-on discrete 12 V to 3.3 V regulator; supplies the Ethernet + * controllers, the USB 3.x hub, the user LED and the expansion + * connectors. + */ + ext_3v3: regulator-ext-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "ext_3v3"; + vin-supply = <&vcc12v_dcin>; + }; + + /* Always-on discrete 12 V to 3.3 V regulator for the two M.2 slots. */ + pcie_3v3: regulator-pcie-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "pcie_3v3"; + vin-supply = <&vcc12v_dcin>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vcc_1v1_nldo_s3"; + vin-supply = <&vcc4v0_sys>; + }; + + /* Load switch off vcc_3v3_s3; supplies the eMMC, the SPI NOR and PMUIO2. */ + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s0"; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc12v_dcin: regulator-vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-name = "vcc12v_dcin"; + }; + + /* + * Supplies the PI6C557-05B buffer that fans the PCIe 3.0 reference + * clock out to the x4 M.2 slot. It has no consumer of its own, so + * keep it on. + */ + vcc3v3_pcie_clk: regulator-vcc3v3-pcie-clk { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie30_clk_en>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pcie_clk"; + vin-supply = <&vcc4v0_sys>; + }; + + vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwren>; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_sd_s0"; + vin-supply = <&vcc_3v3_s3>; + }; + + /* Feeds the RK806 and the three RK860x CPU/NPU regulators. */ + vcc4v0_sys: regulator-vcc4v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + regulator-name = "vcc4v0_sys"; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_sys"; + vin-supply = <&vcc12v_dcin>; + }; + + /* Type-C VBUS, switched by an SY6280AAC limited to 1.0 A. */ + vcc5v0_usb0: regulator-vcc5v0-usb0 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&typec5v_pwren>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "vcc5v0_usb0"; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +/* DisplayPort alternate mode, out over the USB Type-C connector. */ +&dp0 { + status = "okay"; +}; + +&dp0_in { + dp0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint = <&usbdp_phy0_dp_in>; + }; +}; + +&gpio1 { + /* + * Radio disable of the mini PCIe slot, active low. Deassert it so a + * fitted card is allowed to transmit. + */ + minipcie-w-disable-hog { + gpio-hog; + gpios = ; + line-name = "minipcie_w_disable_n"; + output-high; + }; +}; + +&gpio3 { + /* + * The on-board VL822 USB 3.x hub has no DT consumer that could own + * these: it is not in the onboard_usb_dev device table. Hold its + * 1.05 V core rail enabled and hold it out of reset. + */ + usb-hub-power-hog { + gpio-hog; + gpios = ; + line-name = "usb_hub30_en"; + output-high; + }; + + usb-hub-reset-hog { + gpio-hog; + gpios = ; + line-name = "sys_3v3_en"; + output-high; + }; +}; + +&gpio4 { + /* + * PERST# of the mini PCIe slot, active low. The slot carries USB and + * I2C rather than PCIe, so nothing claims this line; hold it + * deasserted to let a fitted card run. + */ + minipcie-perst-hog { + gpio-hog; + gpios = ; + line-name = "minipcie_perst_n"; + output-high; + }; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + status = "okay"; +}; + +&hdmi0 { + frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + status = "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi0>; + }; +}; + +&hdmi0_out { + hdmi0_out_con: endpoint { + remote-endpoint = <&hdmi0_con_in>; + }; +}; + +&hdmi0_sound { + status = "okay"; +}; + +&hdmi1 { + frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + status = "okay"; +}; + +&hdmi1_in { + hdmi1_in_vp1: endpoint { + remote-endpoint = <&vp1_out_hdmi1>; + }; +}; + +&hdmi1_out { + hdmi1_out_con: endpoint { + remote-endpoint = <&hdmi1_con_in>; + }; +}; + +&hdmi1_sound { + status = "okay"; +}; + +/* HDMI input, on its own Type-A connector. */ +&hdmi_receiver { + hpd-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin + &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; + status = "okay"; +}; + +&hdmi_receiver_cma { + status = "okay"; +}; + +&hdptxphy0 { + status = "okay"; +}; + +&hdptxphy1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m2_xfer>; + status = "okay"; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +/* Exposed on the 40-pin header: pin 3 (SDA) and pin 5 (SCL). */ +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m1_xfer>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; + status = "okay"; + + eeprom@57 { + compatible = "atmel,24c256"; + reg = <0x57>; + pagesize = <16>; + vcc-supply = <&vcc_3v3_s0>; + }; +}; + +&i2c6 { + status = "okay"; + + /* + * Awinic AW35615, register-compatible with the FUSB302B. An HUSB311 + * at 0x4e is an alternate BOM option, not fitted by default. + */ + usbc0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_int>; + vbus-supply = <&vcc5v0_usb0>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; + op-sink-microwatt = <1000000>; + power-role = "dual"; + /* The VBUS switch on this port is limited to 1.0 A. */ + sink-pdos = ; + source-pdos = ; + try-power-role = "sink"; + + altmodes { + displayport { + svid = /bits/ 16 <0xff01>; + vdo = <0xffffffff>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_hs: endpoint { + remote-endpoint = <&usb_host0_xhci_hs>; + }; + }; + + port@1 { + reg = <1>; + usbc0_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_out>; + }; + }; + + port@2 { + reg = <2>; + usbc0_sbu: endpoint { + remote-endpoint = <&usbdp_phy0_dp_out>; + }; + }; + }; + }; + }; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "pcf8563"; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pcf8563_int>; + wakeup-source; + }; +}; + +&i2c7 { + status = "okay"; + + es8311: audio-codec@18 { + compatible = "everest,es8311"; + reg = <0x18>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + #sound-dai-cells = <0>; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; +}; + +&i2s5_8ch { + status = "okay"; +}; + +&i2s6_8ch { + status = "okay"; +}; + +&package_thermal { + polling-delay = <1000>; + + trips { + package_fan0: package-fan0 { + temperature = <50000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan1: package-fan1 { + temperature = <55000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan2: package-fan2 { + temperature = <60000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan3: package-fan3 { + temperature = <65000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan4: package-fan4 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + package_fan5: package-fan5 { + temperature = <75000>; + hysteresis = <2000>; + type = "active"; + }; + }; + + cooling-maps { + map-fan0 { + trip = <&package_fan0>; + cooling-device = <&fan 1 1>; + }; + + map-fan1 { + trip = <&package_fan1>; + cooling-device = <&fan 2 2>; + }; + + map-fan2 { + trip = <&package_fan2>; + cooling-device = <&fan 3 3>; + }; + + map-fan3 { + trip = <&package_fan3>; + cooling-device = <&fan 4 4>; + }; + + map-fan4 { + trip = <&package_fan4>; + cooling-device = <&fan 5 5>; + }; + + map-fan5 { + trip = <&package_fan5>; + cooling-device = <&fan 6 6>; + }; + }; +}; + +/* Realtek RTL8125B, right Ethernet port, marked ETH1 on the enclosure. */ +&pcie2x1l0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_1_rst>; + reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&ext_3v3>; + status = "okay"; + + pcie@0,0 { + reg = <0x200000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + device_type = "pci"; + bus-range = <0x21 0x2f>; + + rtl_eth1: ethernet@0,0 { + compatible = "pci10ec,8125"; + reg = <0x210000 0 0 0 0>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; +}; + +/* M.2 M-key slot, PCIe 2.0 x1. */ +&pcie2x1l1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_rst>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie_3v3>; + status = "okay"; +}; + +/* + * Realtek RTL8125B, left Ethernet port, marked ETH0 on the enclosure. The + * reset line is called PCIE20_1_2_WAKEn_M1_L on the schematic, but it is + * wired to the controller's PERSTB pin. + */ +&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_0_rst>; + reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&ext_3v3>; + status = "okay"; + + pcie@0,0 { + reg = <0x400000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + device_type = "pci"; + bus-range = <0x41 0x4f>; + + rtl_eth0: ethernet@0,0 { + compatible = "pci10ec,8125"; + reg = <0x410000 0 0 0 0>; + local-mac-address = [00 00 00 00 00 00]; + }; + }; +}; + +&pcie30phy { + status = "okay"; +}; + +/* M.2 M-key slot, PCIe 3.0 x4. */ +&pcie3x4 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie3_rst>; + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie_3v3>; + status = "okay"; +}; + +&pinctrl { + fan { + /* Pull down so the fan is off while the PWM is disabled. */ + fan_pwm: fan-pwm { + rockchip,pins = <4 RK_PC2 11 &pcfg_pull_down_drv_level_2>; + }; + + fan_tach: fan-tach { + rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmirx { + hdmirx_hpd: hdmirx-5v-detection { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + headphone { + hp_con: hp-con { + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hp_det: hp-det { + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + user_led_b: user-led-b { + rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led_g: user-led-g { + rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led_r: user-led-r { + rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcf8563 { + pcf8563_int: pcf8563-int { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie2_0_rst: pcie2-0-rst { + rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_1_rst: pcie2-1-rst { + rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_2_rst: pcie2-2-rst { + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie30_clk_en: pcie30-clk-en { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie3_rst: pcie3-rst { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc { + sdmmc_pwren: sdmmc-pwren { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + typec5v_pwren: typec5v-pwren { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_int: usbc0-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + usbc0_sbu1: usbc0-sbu1 { + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_sbu2: usbc0-sbu2 { + rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&fan_pwm>; + status = "okay"; +}; + +&rknn_core_0 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_core_1 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_core_2 { + npu-supply = <&vdd_npu_s0>; + sram-supply = <&vdd_npu_s0>; + status = "okay"; +}; + +&rknn_mmu_0 { + status = "okay"; +}; + +&rknn_mmu_1 { + status = "okay"; +}; + +&rknn_mmu_2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd_s0>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim2_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + vcc-supply = <&vcc_3v3_s0>; + }; +}; + +/* + * Exposed on the 40-pin header: pins 19 (MOSI), 21 (MISO), 23 (SCLK) and + * 24 (CE0). The same pins reach the mini PCIe slot's PCM lines, which a + * LoRa concentrator drives as an SPI bus, so leave the controller + * disabled and let an overlay enable it for whichever is in use. + */ +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1m0_pins &spi1m0_cs0>; + status = "disabled"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + #gpio-cells = <2>; + gpio-controller; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency = <1000000>; + system-power-controller; + vcc1-supply = <&vcc4v0_sys>; + vcc2-supply = <&vcc4v0_sys>; + vcc3-supply = <&vcc4v0_sys>; + vcc4-supply = <&vcc4v0_sys>; + vcc5-supply = <&vcc4v0_sys>; + vcc6-supply = <&vcc4v0_sys>; + vcc7-supply = <&vcc4v0_sys>; + vcc8-supply = <&vcc4v0_sys>; + vcc9-supply = <&vcc4v0_sys>; + vcc10-supply = <&vcc4v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc4v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc4v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-boot-on; + regulator-enable-ramp-delay = <400>; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_gpu_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <800000>; + regulator-name = "vdd_log_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd_vdenc_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd_ddr_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-name = "vcc_2v0_pldo_s3"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + /* + * PLDO4 is the analog 3.3 V rail (vcca_3v3_s0 on the + * schematic); the board's digital vcc_3v3_s0 is a + * separate load switch off vcc_3v3_s3. + */ + avcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc_3v3_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd_s0"; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + /* Supplies the HDMI/eDP transmitters (837.5 mV). */ + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <837500>; + regulator-max-microvolt = <837500>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <837500>; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&u2phy1 { + status = "okay"; +}; + +/* USB 2.0 half of the link to the on-board USB 3.x hub. */ +&u2phy1_otg { + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +/* Exposed on the 40-pin header: pin 33 (TX) and pin 35 (RX). */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4m0_xfer>; + status = "okay"; +}; + +/* The USB Type-C port. */ +&usb_host0_xhci { + usb-role-switch; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb_host0_xhci_hs: endpoint { + remote-endpoint = <&usbc0_hs>; + }; + }; + + port@1 { + reg = <1>; + usb_host0_xhci_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_in>; + }; + }; + }; +}; + +/* USB 2.0 host port, routed to the mini PCIe slot. */ +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +/* + * Upstream port of the on-board VL822 hub, which fans out to the four + * USB 3.0 Type-A connectors. + */ +&usb_host1_xhci { + dr_mode = "host"; + status = "okay"; +}; + +/* SuperSpeed and DisplayPort halves of the USB Type-C port. */ +&usbdp_phy0 { + mode-switch; + orientation-switch; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_sbu1>, <&usbc0_sbu2>; + sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + usbdp_phy0_ss_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_ss>; + }; + + usbdp_phy0_ss_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&usb_host0_xhci_ss>; + }; + + usbdp_phy0_dp_in: endpoint@2 { + reg = <2>; + remote-endpoint = <&dp0_out_con>; + }; + + usbdp_phy0_dp_out: endpoint@3 { + reg = <3>; + remote-endpoint = <&usbc0_sbu>; + }; + }; +}; + +/* SuperSpeed half of the link to the on-board USB 3.x hub. */ +&usbdp_phy1 { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi0_in_vp0>; + }; +}; + +&vp1 { + vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { + reg = ; + remote-endpoint = <&hdmi1_in_vp1>; + }; +}; + +&vp2 { + vp2_out_dp0: endpoint@a { + reg = ; + remote-endpoint = <&dp0_in_vp2>; + }; +};