diff --git a/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c b/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c
index 3ed90d418d..3a12a91757 100644
--- a/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c
+++ b/hw/mcu/stm/stm32h7xx/src/clock_stm32h7xx.c
@@ -50,11 +50,6 @@ SystemClock_Config(void)
     RCC_PeriphCLKInitTypeDef per_clk_init = {0};
     HAL_StatusTypeDef status;
 
-    /* Enable the MCU instruction cache */
-#if MYNEWT_VAL(STM32_ENABLE_ICACHE)
-    SCB_EnableICache();
-#endif
-
     /*
      *  Supply configuration update enable
      */
diff --git a/hw/mcu/stm/stm32h7xx/src/hal_system_init.c b/hw/mcu/stm/stm32h7xx/src/hal_system_init.c
index 8bd31e745f..bec62d8c28 100644
--- a/hw/mcu/stm/stm32h7xx/src/hal_system_init.c
+++ b/hw/mcu/stm/stm32h7xx/src/hal_system_init.c
@@ -33,7 +33,16 @@ hal_system_init(void)
     /* Update SystemCoreClock global variable */
     SystemCoreClockUpdate();
 
+    /* Enable the instruction cache */
+#if MYNEWT_VAL(STM32_ENABLE_ICACHE)
+    SCB_EnableICache();
+#endif
+
+    /* Enable the data cache */
+#if MYNEWT_VAL(STM32_ENABLE_DCACHE)
+    SCB_EnableDCache();
+#endif
+
     /* Relocate the vector table */
     NVIC_Relocate();
 }
-
diff --git a/hw/mcu/stm/stm32h7xx/syscfg.yml b/hw/mcu/stm/stm32h7xx/syscfg.yml
index 708862f652..68e893bf7f 100644
--- a/hw/mcu/stm/stm32h7xx/syscfg.yml
+++ b/hw/mcu/stm/stm32h7xx/syscfg.yml
@@ -34,6 +34,10 @@ syscfg.defs:
         description: Enable instruction caching
         value: 1
 
+    STM32_ENABLE_DCACHE:
+        description: Enable data caching
+        value: 1
+
     STM32_CLOCK_VOLTAGESCALING_CONFIG:
         description: Voltage scale
         value: 0